xref: /dpdk/doc/guides/cryptodevs/dpaa2_sec.rst (revision 4562de326d30547a49f6709103008d8384fb9002) 
1..  SPDX-License-Identifier: BSD-3-Clause
2    Copyright 2016 NXP
3
4
5
6NXP DPAA2 CAAM (DPAA2_SEC)
7==========================
8
9The DPAA2_SEC PMD provides poll mode crypto driver support for NXP DPAA2 CAAM
10hardware accelerator.
11
12Architecture
13------------
14
15SEC is the SOC's security engine, which serves as NXP's latest cryptographic
16acceleration and offloading hardware. It combines functions previously
17implemented in separate modules to create a modular and scalable acceleration
18and assurance engine. It also implements block encryption algorithms, stream
19cipher algorithms, hashing algorithms, public key algorithms, run-time
20integrity checking, and a hardware random number generator. SEC performs
21higher-level cryptographic operations than previous NXP cryptographic
22accelerators. This provides significant improvement to system level performance.
23
24DPAA2_SEC is one of the hardware resource in DPAA2 Architecture. More information
25on DPAA2 Architecture is described in :ref:`dpaa2_overview`.
26
27DPAA2_SEC PMD is one of DPAA2 drivers which interacts with Management Complex (MC)
28portal to access the hardware object - DPSECI. The MC provides access to create,
29discover, connect, configure and destroy dpseci objects in DPAA2_SEC PMD.
30
31DPAA2_SEC PMD also uses some of the other hardware resources like buffer pools,
32queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
33
34DPSECI objects are detected by PMD using a resource container called DPRC (like
35in :ref:`dpaa2_overview`).
36
37For example:
38
39.. code-block:: console
40
41    DPRC.1 (bus)
42      |
43      +--+--------+-------+-------+-------+---------+
44         |        |       |       |       |         |
45       DPMCP.1  DPIO.1  DPBP.1  DPNI.1  DPMAC.1  DPSECI.1
46       DPMCP.2  DPIO.2          DPNI.2  DPMAC.2  DPSECI.2
47       DPMCP.3
48
49Implementation
50--------------
51
52SEC provides platform assurance by working with SecMon, which is a companion
53logic block that tracks the security state of the SOC. SEC is programmed by
54means of descriptors (not to be confused with frame descriptors (FDs)) that
55indicate the operations to be performed and link to the message and
56associated data. SEC incorporates two DMA engines to fetch the descriptors,
57read the message data, and write the results of the operations. The DMA
58engine provides a scatter/gather capability so that SEC can read and write
59data scattered in memory. SEC may be configured by means of software for
60dynamic changes in byte ordering. The default configuration for this version
61of SEC is little-endian mode.
62
63A block diagram similar to dpaa2 NIC is shown below to show where DPAA2_SEC
64fits in the DPAA2 Bus model
65
66.. code-block:: console
67
68
69                                       +----------------+
70                                       | DPDK DPAA2_SEC |
71                                       |     PMD        |
72                                       +----------------+       +------------+
73                                       |  MC SEC object |.......|  Mempool   |
74                    . . . . . . . . .  |   (DPSECI)     |       |  (DPBP)    |
75                   .                   +---+---+--------+       +-----+------+
76                  .                        ^   |                      .
77                 .                         |   |<enqueue,             .
78                .                          |   | dequeue>             .
79               .                           |   |                      .
80              .                        +---+---V----+                 .
81             .      . . . . . . . . . .| DPIO driver|                 .
82            .      .                   |  (DPIO)    |                 .
83           .      .                    +-----+------+                 .
84          .      .                     |  QBMAN     |                 .
85         .      .                      |  Driver    |                 .
86    +----+------+-------+              +-----+----- |                 .
87    |   dpaa2 bus       |                    |                        .
88    |   VFIO fslmc-bus  |....................|.........................
89    |                   |                    |
90    |     /bus/fslmc    |                    |
91    +-------------------+                    |
92                                             |
93    ========================== HARDWARE =====|=======================
94                                           DPIO
95                                             |
96                                           DPSECI---DPBP
97    =========================================|========================
98
99
100
101Features
102--------
103
104The DPAA2_SEC PMD has support for:
105
106Cipher algorithms:
107
108* ``RTE_CRYPTO_CIPHER_3DES_CBC``
109* ``RTE_CRYPTO_CIPHER_AES128_CBC``
110* ``RTE_CRYPTO_CIPHER_AES192_CBC``
111* ``RTE_CRYPTO_CIPHER_AES256_CBC``
112* ``RTE_CRYPTO_CIPHER_AES128_CTR``
113* ``RTE_CRYPTO_CIPHER_AES192_CTR``
114* ``RTE_CRYPTO_CIPHER_AES256_CTR``
115
116Hash algorithms:
117
118* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
119* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
120* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
121* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
122* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
123* ``RTE_CRYPTO_AUTH_MD5_HMAC``
124* ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
125* ``RTE_CRYPTO_AUTH_AES_CMAC``
126
127AEAD algorithms:
128
129* ``RTE_CRYPTO_AEAD_AES_GCM``
130
131Supported DPAA2 SoCs
132--------------------
133
134* LS2160A
135* LS2084A/LS2044A
136* LS2088A/LS2048A
137* LS1088A/LS1048A
138
139Allowing & Blocking
140-------------------
141
142The DPAA2 SEC device can be blocked with the following:
143
144 .. code-block:: console
145
146    <dpdk app> <EAL args> -b "fslmc:dpseci.x" -- ...
147
148Where x is the device object id as configured in resource container.
149
150Limitations
151-----------
152
153* Hash followed by Cipher mode is not supported
154* Only supports the session-oriented API implementation (session-less APIs are not supported).
155
156Prerequisites
157-------------
158
159DPAA2_SEC driver has similar pre-requisites as described in :ref:`dpaa2_overview`.
160The following dependencies are not part of DPDK and must be installed separately:
161
162See :doc:`../platform/dpaa2` for setup information
163
164- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
165
166
167Enabling logs
168-------------
169
170For enabling logs, use the following EAL parameter:
171
172.. code-block:: console
173
174   ./your_crypto_application <EAL args> --log-level=pmd.crypto.dpaa2:<level>
175
176Using ``crypto.dpaa2`` as log matching criteria, all Crypto PMD logs can be
177enabled which are lower than logging ``level``.
178
179Enabling debug prints
180---------------------
181
182Use dev arg option ``drv_dump_mode=x`` to dump useful debug prints on HW sec
183error. There are 3 dump modes available 0, 1 and 2. Mode 0 means no dump print
184on error, mode 1 means dump HW error code and mode 2 means dump HW error code
185along with other useful debugging information like session, queue, descriptor
186data.
187e.g. ``fslmc:dpseci.1,drv_dump_mode=1``
188
189Enable strict ordering
190----------------------
191
192Use dev arg option ``drv_strict_order=1`` to enable strict ordering.
193By default, loose ordering is set for ordered schedule type event.
194e.g. ``fslmc:dpseci.1,drv_strict_order=1``
195