1.. SPDX-License-Identifier: BSD-3-Clause 2 Copyright 2018 NXP 3 4 5NXP CAAM JOB RING (caam_jr) 6=========================== 7 8The caam_jr PMD provides poll mode crypto driver support for NXP SEC 4.x+ (CAAM) 9hardware accelerator. More information is available at: 10 11`NXP Cryptographic Acceleration Technology <https://www.nxp.com/applications/solutions/internet-of-things/secure-things/network-security-technology/cryptographic-acceleration-technology:NETWORK_SECURITY_CRYPTOG>`_. 12 13Architecture 14------------ 15 16SEC is the SOC's security engine, which serves as NXP's latest cryptographic 17acceleration and offloading hardware. It combines functions previously 18implemented in separate modules to create a modular and scalable acceleration 19and assurance engine. It also implements block encryption algorithms, stream 20cipher algorithms, hashing algorithms, public key algorithms, run-time 21integrity checking, and a hardware random number generator. SEC performs 22higher-level cryptographic operations than previous NXP cryptographic 23accelerators. This provides significant improvement to system level performance. 24 25SEC HW accelerator above 4.x+ version are also known as CAAM. 26 27caam_jr PMD is one of DPAA drivers which uses UIO interface to interact with 28Linux kernel for configure and destroy the device instance (ring). 29 30 31Implementation 32-------------- 33 34SEC provides platform assurance by working with SecMon, which is a companion 35logic block that tracks the security state of the SOC. SEC is programmed by 36means of descriptors (not to be confused with frame descriptors (FDs)) that 37indicate the operations to be performed and link to the message and 38associated data. SEC incorporates two DMA engines to fetch the descriptors, 39read the message data, and write the results of the operations. The DMA 40engine provides a scatter/gather capability so that SEC can read and write 41data scattered in memory. SEC may be configured by means of software for 42dynamic changes in byte ordering. The default configuration for this version 43of SEC is little-endian mode. 44 45Note that one physical Job Ring represent one caam_jr device. 46 47Features 48-------- 49 50The CAAM_JR PMD has support for: 51 52Cipher algorithms: 53 54* ``RTE_CRYPTO_CIPHER_3DES_CBC`` 55* ``RTE_CRYPTO_CIPHER_AES128_CBC`` 56* ``RTE_CRYPTO_CIPHER_AES192_CBC`` 57* ``RTE_CRYPTO_CIPHER_AES256_CBC`` 58* ``RTE_CRYPTO_CIPHER_AES128_CTR`` 59* ``RTE_CRYPTO_CIPHER_AES192_CTR`` 60* ``RTE_CRYPTO_CIPHER_AES256_CTR`` 61 62Hash algorithms: 63 64* ``RTE_CRYPTO_AUTH_SHA1_HMAC`` 65* ``RTE_CRYPTO_AUTH_SHA224_HMAC`` 66* ``RTE_CRYPTO_AUTH_SHA256_HMAC`` 67* ``RTE_CRYPTO_AUTH_SHA384_HMAC`` 68* ``RTE_CRYPTO_AUTH_SHA512_HMAC`` 69* ``RTE_CRYPTO_AUTH_MD5_HMAC`` 70 71AEAD algorithms: 72 73* ``RTE_CRYPTO_AEAD_AES_GCM`` 74 75Supported DPAA SoCs 76-------------------- 77 78* LS1046A/LS1026A 79* LS1043A/LS1023A 80* LS1028A 81* LS1012A 82 83Limitations 84----------- 85 86* Hash followed by Cipher mode is not supported 87* Only supports the session-oriented API implementation (session-less APIs are not supported). 88 89Prerequisites 90------------- 91 92caam_jr driver has following dependencies are not part of DPDK and must be installed separately: 93 94* **NXP Linux SDK** 95 96 NXP Linux software development kit (SDK) includes support for the family 97 of QorIQ® ARM-Architecture-based system on chip (SoC) processors 98 and corresponding boards. 99 100 It includes the Linux board support packages (BSPs) for NXP SoCs, 101 a fully operational tool chain, kernel and board specific modules. 102 103 SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_. 104 105Currently supported by DPDK: 106 107* NXP SDK **18.09+**. 108* Supported architectures: **arm64 LE**. 109 110* Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment. 111 112 113Enabling logs 114------------- 115 116For enabling logs, use the following EAL parameter: 117 118.. code-block:: console 119 120 ./your_crypto_application <EAL args> --log-level=pmd.crypto.caam,<level> 121