1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include "test_perf_common.h" 6 7 /* See http://doc.dpdk.org/guides/tools/testeventdev.html for test details */ 8 9 static inline int 10 atq_nb_event_queues(struct evt_options *opt) 11 { 12 /* nb_queues = number of producers */ 13 return opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR ? 14 rte_eth_dev_count_avail() : evt_nr_active_lcores(opt->plcores); 15 } 16 17 static __rte_always_inline void 18 atq_mark_fwd_latency(struct rte_event *const ev) 19 { 20 if (unlikely(ev->sub_event_type == 0)) { 21 struct perf_elt *const m = ev->event_ptr; 22 23 m->timestamp = rte_get_timer_cycles(); 24 } 25 } 26 27 static __rte_always_inline void 28 atq_fwd_event(struct rte_event *const ev, uint8_t *const sched_type_list, 29 const uint8_t nb_stages) 30 { 31 ev->sub_event_type++; 32 ev->sched_type = sched_type_list[ev->sub_event_type % nb_stages]; 33 ev->op = RTE_EVENT_OP_FORWARD; 34 ev->event_type = RTE_EVENT_TYPE_CPU; 35 } 36 37 static int 38 perf_atq_worker(void *arg, const int enable_fwd_latency) 39 { 40 PERF_WORKER_INIT; 41 struct rte_event ev; 42 43 while (t->done == false) { 44 uint16_t event = rte_event_dequeue_burst(dev, port, &ev, 1, 0); 45 46 if (!event) { 47 rte_pause(); 48 continue; 49 } 50 51 if (prod_crypto_type && 52 (ev.event_type == RTE_EVENT_TYPE_CRYPTODEV)) { 53 struct rte_crypto_op *op = ev.event_ptr; 54 55 if (op->status == RTE_CRYPTO_OP_STATUS_SUCCESS) { 56 if (op->sym->m_dst == NULL) 57 ev.event_ptr = op->sym->m_src; 58 else 59 ev.event_ptr = op->sym->m_dst; 60 rte_crypto_op_free(op); 61 } else { 62 rte_crypto_op_free(op); 63 continue; 64 } 65 } 66 67 if (enable_fwd_latency && !prod_timer_type) 68 /* first stage in pipeline, mark ts to compute fwd latency */ 69 atq_mark_fwd_latency(&ev); 70 71 /* last stage in pipeline */ 72 if (unlikely((ev.sub_event_type % nb_stages) == laststage)) { 73 if (enable_fwd_latency) 74 cnt = perf_process_last_stage_latency(pool, 75 &ev, w, bufs, sz, cnt); 76 else 77 cnt = perf_process_last_stage(pool, &ev, w, 78 bufs, sz, cnt); 79 } else { 80 atq_fwd_event(&ev, sched_type_list, nb_stages); 81 while (rte_event_enqueue_burst(dev, port, &ev, 1) != 1) 82 rte_pause(); 83 } 84 } 85 return 0; 86 } 87 88 static int 89 perf_atq_worker_burst(void *arg, const int enable_fwd_latency) 90 { 91 PERF_WORKER_INIT; 92 uint16_t i; 93 /* +1 to avoid prefetch out of array check */ 94 struct rte_event ev[BURST_SIZE + 1]; 95 96 while (t->done == false) { 97 uint16_t const nb_rx = rte_event_dequeue_burst(dev, port, ev, 98 BURST_SIZE, 0); 99 100 if (!nb_rx) { 101 rte_pause(); 102 continue; 103 } 104 105 for (i = 0; i < nb_rx; i++) { 106 if (prod_crypto_type && 107 (ev[i].event_type == RTE_EVENT_TYPE_CRYPTODEV)) { 108 struct rte_crypto_op *op = ev[i].event_ptr; 109 110 if (op->status == 111 RTE_CRYPTO_OP_STATUS_SUCCESS) { 112 if (op->sym->m_dst == NULL) 113 ev[i].event_ptr = 114 op->sym->m_src; 115 else 116 ev[i].event_ptr = 117 op->sym->m_dst; 118 rte_crypto_op_free(op); 119 } else { 120 rte_crypto_op_free(op); 121 continue; 122 } 123 } 124 125 if (enable_fwd_latency && !prod_timer_type) { 126 rte_prefetch0(ev[i+1].event_ptr); 127 /* first stage in pipeline. 128 * mark time stamp to compute fwd latency 129 */ 130 atq_mark_fwd_latency(&ev[i]); 131 } 132 /* last stage in pipeline */ 133 if (unlikely((ev[i].sub_event_type % nb_stages) 134 == laststage)) { 135 if (enable_fwd_latency) 136 cnt = perf_process_last_stage_latency( 137 pool, &ev[i], w, bufs, sz, cnt); 138 else 139 cnt = perf_process_last_stage(pool, 140 &ev[i], w, bufs, sz, cnt); 141 142 ev[i].op = RTE_EVENT_OP_RELEASE; 143 } else { 144 atq_fwd_event(&ev[i], sched_type_list, 145 nb_stages); 146 } 147 } 148 149 uint16_t enq; 150 151 enq = rte_event_enqueue_burst(dev, port, ev, nb_rx); 152 while (enq < nb_rx) { 153 enq += rte_event_enqueue_burst(dev, port, 154 ev + enq, nb_rx - enq); 155 } 156 } 157 return 0; 158 } 159 160 static int 161 worker_wrapper(void *arg) 162 { 163 struct worker_data *w = arg; 164 struct evt_options *opt = w->t->opt; 165 166 const bool burst = evt_has_burst_mode(w->dev_id); 167 const int fwd_latency = opt->fwd_latency; 168 169 /* allow compiler to optimize */ 170 if (!burst && !fwd_latency) 171 return perf_atq_worker(arg, 0); 172 else if (!burst && fwd_latency) 173 return perf_atq_worker(arg, 1); 174 else if (burst && !fwd_latency) 175 return perf_atq_worker_burst(arg, 0); 176 else if (burst && fwd_latency) 177 return perf_atq_worker_burst(arg, 1); 178 179 rte_panic("invalid worker\n"); 180 } 181 182 static int 183 perf_atq_launch_lcores(struct evt_test *test, struct evt_options *opt) 184 { 185 return perf_launch_lcores(test, opt, worker_wrapper); 186 } 187 188 static int 189 perf_atq_eventdev_setup(struct evt_test *test, struct evt_options *opt) 190 { 191 int ret; 192 uint8_t queue; 193 uint8_t nb_queues; 194 uint8_t nb_ports; 195 uint16_t prod; 196 struct rte_event_dev_info dev_info; 197 struct test_perf *t = evt_test_priv(test); 198 199 nb_ports = evt_nr_active_lcores(opt->wlcores); 200 nb_ports += (opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR || 201 opt->prod_type == EVT_PROD_TYPE_EVENT_TIMER_ADPTR) ? 0 : 202 evt_nr_active_lcores(opt->plcores); 203 204 nb_queues = atq_nb_event_queues(opt); 205 206 memset(&dev_info, 0, sizeof(struct rte_event_dev_info)); 207 ret = rte_event_dev_info_get(opt->dev_id, &dev_info); 208 if (ret) { 209 evt_err("failed to get eventdev info %d", opt->dev_id); 210 return ret; 211 } 212 213 ret = evt_configure_eventdev(opt, nb_queues, nb_ports); 214 if (ret) { 215 evt_err("failed to configure eventdev %d", opt->dev_id); 216 return ret; 217 } 218 219 struct rte_event_queue_conf q_conf = { 220 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL, 221 .event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES, 222 .nb_atomic_flows = opt->nb_flows, 223 .nb_atomic_order_sequences = opt->nb_flows, 224 }; 225 /* queue configurations */ 226 for (queue = 0; queue < nb_queues; queue++) { 227 ret = rte_event_queue_setup(opt->dev_id, queue, &q_conf); 228 if (ret) { 229 evt_err("failed to setup queue=%d", queue); 230 return ret; 231 } 232 } 233 234 if (opt->wkr_deq_dep > dev_info.max_event_port_dequeue_depth) 235 opt->wkr_deq_dep = dev_info.max_event_port_dequeue_depth; 236 237 /* port configuration */ 238 const struct rte_event_port_conf p_conf = { 239 .dequeue_depth = opt->wkr_deq_dep, 240 .enqueue_depth = dev_info.max_event_port_dequeue_depth, 241 .new_event_threshold = dev_info.max_num_events, 242 }; 243 244 ret = perf_event_dev_port_setup(test, opt, 1 /* stride */, nb_queues, 245 &p_conf); 246 if (ret) 247 return ret; 248 249 if (!evt_has_distributed_sched(opt->dev_id)) { 250 uint32_t service_id; 251 rte_event_dev_service_id_get(opt->dev_id, &service_id); 252 ret = evt_service_setup(service_id); 253 if (ret) { 254 evt_err("No service lcore found to run event dev."); 255 return ret; 256 } 257 } 258 259 ret = rte_event_dev_start(opt->dev_id); 260 if (ret) { 261 evt_err("failed to start eventdev %d", opt->dev_id); 262 return ret; 263 } 264 265 if (opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR) { 266 RTE_ETH_FOREACH_DEV(prod) { 267 ret = rte_eth_dev_start(prod); 268 if (ret) { 269 evt_err("Ethernet dev [%d] failed to start. Using synthetic producer", 270 prod); 271 return ret; 272 } 273 274 ret = rte_event_eth_rx_adapter_start(prod); 275 if (ret) { 276 evt_err("Rx adapter[%d] start failed", prod); 277 return ret; 278 } 279 printf("%s: Port[%d] using Rx adapter[%d] started\n", 280 __func__, prod, prod); 281 } 282 } else if (opt->prod_type == EVT_PROD_TYPE_EVENT_TIMER_ADPTR) { 283 for (prod = 0; prod < opt->nb_timer_adptrs; prod++) { 284 ret = rte_event_timer_adapter_start( 285 t->timer_adptr[prod]); 286 if (ret) { 287 evt_err("failed to Start event timer adapter %d" 288 , prod); 289 return ret; 290 } 291 } 292 } else if (opt->prod_type == EVT_PROD_TYPE_EVENT_CRYPTO_ADPTR) { 293 uint8_t cdev_id, cdev_count; 294 295 cdev_count = rte_cryptodev_count(); 296 for (cdev_id = 0; cdev_id < cdev_count; cdev_id++) { 297 ret = rte_cryptodev_start(cdev_id); 298 if (ret) { 299 evt_err("Failed to start cryptodev %u", 300 cdev_id); 301 return ret; 302 } 303 } 304 } 305 306 return 0; 307 } 308 309 static void 310 perf_atq_opt_dump(struct evt_options *opt) 311 { 312 perf_opt_dump(opt, atq_nb_event_queues(opt)); 313 } 314 315 static int 316 perf_atq_opt_check(struct evt_options *opt) 317 { 318 return perf_opt_check(opt, atq_nb_event_queues(opt)); 319 } 320 321 static bool 322 perf_atq_capability_check(struct evt_options *opt) 323 { 324 struct rte_event_dev_info dev_info; 325 326 rte_event_dev_info_get(opt->dev_id, &dev_info); 327 if (dev_info.max_event_queues < atq_nb_event_queues(opt) || 328 dev_info.max_event_ports < perf_nb_event_ports(opt)) { 329 evt_err("not enough eventdev queues=%d/%d or ports=%d/%d", 330 atq_nb_event_queues(opt), dev_info.max_event_queues, 331 perf_nb_event_ports(opt), dev_info.max_event_ports); 332 } 333 if (!evt_has_all_types_queue(opt->dev_id)) 334 return false; 335 336 return true; 337 } 338 339 static const struct evt_test_ops perf_atq = { 340 .cap_check = perf_atq_capability_check, 341 .opt_check = perf_atq_opt_check, 342 .opt_dump = perf_atq_opt_dump, 343 .test_setup = perf_test_setup, 344 .ethdev_setup = perf_ethdev_setup, 345 .cryptodev_setup = perf_cryptodev_setup, 346 .mempool_setup = perf_mempool_setup, 347 .eventdev_setup = perf_atq_eventdev_setup, 348 .launch_lcores = perf_atq_launch_lcores, 349 .eventdev_destroy = perf_eventdev_destroy, 350 .mempool_destroy = perf_mempool_destroy, 351 .ethdev_destroy = perf_ethdev_destroy, 352 .cryptodev_destroy = perf_cryptodev_destroy, 353 .test_result = perf_test_result, 354 .test_destroy = perf_test_destroy, 355 }; 356 357 EVT_TEST_REGISTER(perf_atq); 358