1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include "test_perf_common.h" 6 7 /* See http://dpdk.org/doc/guides/tools/testeventdev.html for test details */ 8 9 static inline int 10 atq_nb_event_queues(struct evt_options *opt) 11 { 12 /* nb_queues = number of producers */ 13 return opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR ? 14 rte_eth_dev_count_avail() : evt_nr_active_lcores(opt->plcores); 15 } 16 17 static inline __attribute__((always_inline)) void 18 atq_mark_fwd_latency(struct rte_event *const ev) 19 { 20 if (unlikely(ev->sub_event_type == 0)) { 21 struct perf_elt *const m = ev->event_ptr; 22 23 m->timestamp = rte_get_timer_cycles(); 24 } 25 } 26 27 static inline __attribute__((always_inline)) void 28 atq_fwd_event(struct rte_event *const ev, uint8_t *const sched_type_list, 29 const uint8_t nb_stages) 30 { 31 ev->sub_event_type++; 32 ev->sched_type = sched_type_list[ev->sub_event_type % nb_stages]; 33 ev->op = RTE_EVENT_OP_FORWARD; 34 ev->event_type = RTE_EVENT_TYPE_CPU; 35 } 36 37 static int 38 perf_atq_worker(void *arg, const int enable_fwd_latency) 39 { 40 PERF_WORKER_INIT; 41 struct rte_event ev; 42 43 while (t->done == false) { 44 uint16_t event = rte_event_dequeue_burst(dev, port, &ev, 1, 0); 45 46 if (!event) { 47 rte_pause(); 48 continue; 49 } 50 51 if (enable_fwd_latency && !prod_timer_type) 52 /* first stage in pipeline, mark ts to compute fwd latency */ 53 atq_mark_fwd_latency(&ev); 54 55 /* last stage in pipeline */ 56 if (unlikely((ev.sub_event_type % nb_stages) == laststage)) { 57 if (enable_fwd_latency) 58 cnt = perf_process_last_stage_latency(pool, 59 &ev, w, bufs, sz, cnt); 60 else 61 cnt = perf_process_last_stage(pool, &ev, w, 62 bufs, sz, cnt); 63 } else { 64 atq_fwd_event(&ev, sched_type_list, nb_stages); 65 while (rte_event_enqueue_burst(dev, port, &ev, 1) != 1) 66 rte_pause(); 67 } 68 } 69 return 0; 70 } 71 72 static int 73 perf_atq_worker_burst(void *arg, const int enable_fwd_latency) 74 { 75 PERF_WORKER_INIT; 76 uint16_t i; 77 /* +1 to avoid prefetch out of array check */ 78 struct rte_event ev[BURST_SIZE + 1]; 79 80 while (t->done == false) { 81 uint16_t const nb_rx = rte_event_dequeue_burst(dev, port, ev, 82 BURST_SIZE, 0); 83 84 if (!nb_rx) { 85 rte_pause(); 86 continue; 87 } 88 89 for (i = 0; i < nb_rx; i++) { 90 if (enable_fwd_latency && !prod_timer_type) { 91 rte_prefetch0(ev[i+1].event_ptr); 92 /* first stage in pipeline. 93 * mark time stamp to compute fwd latency 94 */ 95 atq_mark_fwd_latency(&ev[i]); 96 } 97 /* last stage in pipeline */ 98 if (unlikely((ev[i].sub_event_type % nb_stages) 99 == laststage)) { 100 if (enable_fwd_latency) 101 cnt = perf_process_last_stage_latency( 102 pool, &ev[i], w, bufs, sz, cnt); 103 else 104 cnt = perf_process_last_stage(pool, 105 &ev[i], w, bufs, sz, cnt); 106 107 ev[i].op = RTE_EVENT_OP_RELEASE; 108 } else { 109 atq_fwd_event(&ev[i], sched_type_list, 110 nb_stages); 111 } 112 } 113 114 uint16_t enq; 115 116 enq = rte_event_enqueue_burst(dev, port, ev, nb_rx); 117 while (enq < nb_rx) { 118 enq += rte_event_enqueue_burst(dev, port, 119 ev + enq, nb_rx - enq); 120 } 121 } 122 return 0; 123 } 124 125 static int 126 worker_wrapper(void *arg) 127 { 128 struct worker_data *w = arg; 129 struct evt_options *opt = w->t->opt; 130 131 const bool burst = evt_has_burst_mode(w->dev_id); 132 const int fwd_latency = opt->fwd_latency; 133 134 /* allow compiler to optimize */ 135 if (!burst && !fwd_latency) 136 return perf_atq_worker(arg, 0); 137 else if (!burst && fwd_latency) 138 return perf_atq_worker(arg, 1); 139 else if (burst && !fwd_latency) 140 return perf_atq_worker_burst(arg, 0); 141 else if (burst && fwd_latency) 142 return perf_atq_worker_burst(arg, 1); 143 144 rte_panic("invalid worker\n"); 145 } 146 147 static int 148 perf_atq_launch_lcores(struct evt_test *test, struct evt_options *opt) 149 { 150 return perf_launch_lcores(test, opt, worker_wrapper); 151 } 152 153 static int 154 perf_atq_eventdev_setup(struct evt_test *test, struct evt_options *opt) 155 { 156 int ret; 157 uint8_t queue; 158 uint8_t nb_queues; 159 uint8_t nb_ports; 160 struct rte_event_dev_info dev_info; 161 162 nb_ports = evt_nr_active_lcores(opt->wlcores); 163 nb_ports += (opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR || 164 opt->prod_type == EVT_PROD_TYPE_EVENT_TIMER_ADPTR) ? 0 : 165 evt_nr_active_lcores(opt->plcores); 166 167 nb_queues = atq_nb_event_queues(opt); 168 169 memset(&dev_info, 0, sizeof(struct rte_event_dev_info)); 170 ret = rte_event_dev_info_get(opt->dev_id, &dev_info); 171 if (ret) { 172 evt_err("failed to get eventdev info %d", opt->dev_id); 173 return ret; 174 } 175 176 const struct rte_event_dev_config config = { 177 .nb_event_queues = nb_queues, 178 .nb_event_ports = nb_ports, 179 .nb_events_limit = dev_info.max_num_events, 180 .nb_event_queue_flows = opt->nb_flows, 181 .nb_event_port_dequeue_depth = 182 dev_info.max_event_port_dequeue_depth, 183 .nb_event_port_enqueue_depth = 184 dev_info.max_event_port_enqueue_depth, 185 }; 186 187 ret = rte_event_dev_configure(opt->dev_id, &config); 188 if (ret) { 189 evt_err("failed to configure eventdev %d", opt->dev_id); 190 return ret; 191 } 192 193 struct rte_event_queue_conf q_conf = { 194 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL, 195 .event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES, 196 .nb_atomic_flows = opt->nb_flows, 197 .nb_atomic_order_sequences = opt->nb_flows, 198 }; 199 /* queue configurations */ 200 for (queue = 0; queue < nb_queues; queue++) { 201 ret = rte_event_queue_setup(opt->dev_id, queue, &q_conf); 202 if (ret) { 203 evt_err("failed to setup queue=%d", queue); 204 return ret; 205 } 206 } 207 208 if (opt->wkr_deq_dep > dev_info.max_event_port_dequeue_depth) 209 opt->wkr_deq_dep = dev_info.max_event_port_dequeue_depth; 210 211 /* port configuration */ 212 const struct rte_event_port_conf p_conf = { 213 .dequeue_depth = opt->wkr_deq_dep, 214 .enqueue_depth = dev_info.max_event_port_dequeue_depth, 215 .new_event_threshold = dev_info.max_num_events, 216 }; 217 218 ret = perf_event_dev_port_setup(test, opt, 1 /* stride */, nb_queues, 219 &p_conf); 220 if (ret) 221 return ret; 222 223 if (!evt_has_distributed_sched(opt->dev_id)) { 224 uint32_t service_id; 225 rte_event_dev_service_id_get(opt->dev_id, &service_id); 226 ret = evt_service_setup(service_id); 227 if (ret) { 228 evt_err("No service lcore found to run event dev."); 229 return ret; 230 } 231 } 232 233 ret = rte_event_dev_start(opt->dev_id); 234 if (ret) { 235 evt_err("failed to start eventdev %d", opt->dev_id); 236 return ret; 237 } 238 239 return 0; 240 } 241 242 static void 243 perf_atq_opt_dump(struct evt_options *opt) 244 { 245 perf_opt_dump(opt, atq_nb_event_queues(opt)); 246 } 247 248 static int 249 perf_atq_opt_check(struct evt_options *opt) 250 { 251 return perf_opt_check(opt, atq_nb_event_queues(opt)); 252 } 253 254 static bool 255 perf_atq_capability_check(struct evt_options *opt) 256 { 257 struct rte_event_dev_info dev_info; 258 259 rte_event_dev_info_get(opt->dev_id, &dev_info); 260 if (dev_info.max_event_queues < atq_nb_event_queues(opt) || 261 dev_info.max_event_ports < perf_nb_event_ports(opt)) { 262 evt_err("not enough eventdev queues=%d/%d or ports=%d/%d", 263 atq_nb_event_queues(opt), dev_info.max_event_queues, 264 perf_nb_event_ports(opt), dev_info.max_event_ports); 265 } 266 if (!evt_has_all_types_queue(opt->dev_id)) 267 return false; 268 269 return true; 270 } 271 272 static const struct evt_test_ops perf_atq = { 273 .cap_check = perf_atq_capability_check, 274 .opt_check = perf_atq_opt_check, 275 .opt_dump = perf_atq_opt_dump, 276 .test_setup = perf_test_setup, 277 .ethdev_setup = perf_ethdev_setup, 278 .mempool_setup = perf_mempool_setup, 279 .eventdev_setup = perf_atq_eventdev_setup, 280 .launch_lcores = perf_atq_launch_lcores, 281 .eventdev_destroy = perf_eventdev_destroy, 282 .mempool_destroy = perf_mempool_destroy, 283 .ethdev_destroy = perf_ethdev_destroy, 284 .test_result = perf_test_result, 285 .test_destroy = perf_test_destroy, 286 }; 287 288 EVT_TEST_REGISTER(perf_atq); 289