1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_cycles.h> 7 #include <rte_crypto.h> 8 #include <rte_cryptodev.h> 9 10 #include "cperf_test_throughput.h" 11 #include "cperf_ops.h" 12 #include "cperf_test_common.h" 13 14 struct cperf_throughput_ctx { 15 uint8_t dev_id; 16 uint16_t qp_id; 17 uint8_t lcore_id; 18 19 struct rte_mempool *pool; 20 21 struct rte_cryptodev_sym_session *sess; 22 23 cperf_populate_ops_t populate_ops; 24 25 uint32_t src_buf_offset; 26 uint32_t dst_buf_offset; 27 28 const struct cperf_options *options; 29 const struct cperf_test_vector *test_vector; 30 }; 31 32 static void 33 cperf_throughput_test_free(struct cperf_throughput_ctx *ctx) 34 { 35 if (!ctx) 36 return; 37 if (ctx->sess) { 38 if (ctx->options->op_type == CPERF_ASYM_MODEX) { 39 rte_cryptodev_asym_session_clear(ctx->dev_id, 40 (void *)ctx->sess); 41 rte_cryptodev_asym_session_free((void *)ctx->sess); 42 } 43 #ifdef RTE_LIB_SECURITY 44 else if (ctx->options->op_type == CPERF_PDCP || 45 ctx->options->op_type == CPERF_DOCSIS || 46 ctx->options->op_type == CPERF_IPSEC) { 47 struct rte_security_ctx *sec_ctx = 48 (struct rte_security_ctx *) 49 rte_cryptodev_get_sec_ctx(ctx->dev_id); 50 rte_security_session_destroy( 51 sec_ctx, 52 (struct rte_security_session *)ctx->sess); 53 } 54 #endif 55 else { 56 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess); 57 rte_cryptodev_sym_session_free(ctx->sess); 58 } 59 } 60 if (ctx->pool) 61 rte_mempool_free(ctx->pool); 62 63 rte_free(ctx); 64 } 65 66 void * 67 cperf_throughput_test_constructor(struct rte_mempool *sess_mp, 68 struct rte_mempool *sess_priv_mp, 69 uint8_t dev_id, uint16_t qp_id, 70 const struct cperf_options *options, 71 const struct cperf_test_vector *test_vector, 72 const struct cperf_op_fns *op_fns) 73 { 74 struct cperf_throughput_ctx *ctx = NULL; 75 76 ctx = rte_malloc(NULL, sizeof(struct cperf_throughput_ctx), 0); 77 if (ctx == NULL) 78 goto err; 79 80 ctx->dev_id = dev_id; 81 ctx->qp_id = qp_id; 82 83 ctx->populate_ops = op_fns->populate_ops; 84 ctx->options = options; 85 ctx->test_vector = test_vector; 86 87 /* IV goes at the end of the crypto operation */ 88 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 89 sizeof(struct rte_crypto_sym_op); 90 91 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, 92 test_vector, iv_offset); 93 if (ctx->sess == NULL) 94 goto err; 95 96 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0, 97 &ctx->src_buf_offset, &ctx->dst_buf_offset, 98 &ctx->pool) < 0) 99 goto err; 100 101 return ctx; 102 err: 103 cperf_throughput_test_free(ctx); 104 105 return NULL; 106 } 107 108 int 109 cperf_throughput_test_runner(void *test_ctx) 110 { 111 struct cperf_throughput_ctx *ctx = test_ctx; 112 uint16_t test_burst_size; 113 uint8_t burst_size_idx = 0; 114 uint32_t imix_idx = 0; 115 116 static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); 117 118 struct rte_crypto_op *ops[ctx->options->max_burst_size]; 119 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; 120 uint64_t i; 121 122 uint32_t lcore = rte_lcore_id(); 123 124 #ifdef CPERF_LINEARIZATION_ENABLE 125 struct rte_cryptodev_info dev_info; 126 int linearize = 0; 127 128 /* Check if source mbufs require coalescing */ 129 if ((ctx->options->op_type != CPERF_ASYM_MODEX) && 130 (ctx->options->segment_sz < ctx->options->max_buffer_size)) { 131 rte_cryptodev_info_get(ctx->dev_id, &dev_info); 132 if ((dev_info.feature_flags & 133 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0) 134 linearize = 1; 135 } 136 #endif /* CPERF_LINEARIZATION_ENABLE */ 137 138 ctx->lcore_id = lcore; 139 140 /* Warm up the host CPU before starting the test */ 141 for (i = 0; i < ctx->options->total_ops; i++) 142 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 143 144 /* Get first size from range or list */ 145 if (ctx->options->inc_burst_size != 0) 146 test_burst_size = ctx->options->min_burst_size; 147 else 148 test_burst_size = ctx->options->burst_size_list[0]; 149 150 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 151 sizeof(struct rte_crypto_sym_op); 152 153 while (test_burst_size <= ctx->options->max_burst_size) { 154 uint64_t ops_enqd = 0, ops_enqd_total = 0, ops_enqd_failed = 0; 155 uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0; 156 157 uint64_t tsc_start, tsc_end, tsc_duration; 158 159 uint16_t ops_unused = 0; 160 161 tsc_start = rte_rdtsc_precise(); 162 163 while (ops_enqd_total < ctx->options->total_ops) { 164 165 uint16_t burst_size = ((ops_enqd_total + test_burst_size) 166 <= ctx->options->total_ops) ? 167 test_burst_size : 168 ctx->options->total_ops - 169 ops_enqd_total; 170 171 uint16_t ops_needed = burst_size - ops_unused; 172 173 /* Allocate objects containing crypto operations and mbufs */ 174 if (rte_mempool_get_bulk(ctx->pool, (void **)ops, 175 ops_needed) != 0) { 176 RTE_LOG(ERR, USER1, 177 "Failed to allocate more crypto operations " 178 "from the crypto operation pool.\n" 179 "Consider increasing the pool size " 180 "with --pool-sz\n"); 181 return -1; 182 } 183 184 /* Setup crypto op, attach mbuf etc */ 185 (ctx->populate_ops)(ops, ctx->src_buf_offset, 186 ctx->dst_buf_offset, 187 ops_needed, ctx->sess, 188 ctx->options, ctx->test_vector, 189 iv_offset, &imix_idx, &tsc_start); 190 191 /** 192 * When ops_needed is smaller than ops_enqd, the 193 * unused ops need to be moved to the front for 194 * next round use. 195 */ 196 if (unlikely(ops_enqd > ops_needed)) { 197 size_t nb_b_to_mov = ops_unused * sizeof( 198 struct rte_crypto_op *); 199 200 memmove(&ops[ops_needed], &ops[ops_enqd], 201 nb_b_to_mov); 202 } 203 204 #ifdef CPERF_LINEARIZATION_ENABLE 205 if (linearize) { 206 /* PMD doesn't support scatter-gather and source buffer 207 * is segmented. 208 * We need to linearize it before enqueuing. 209 */ 210 for (i = 0; i < burst_size; i++) 211 rte_pktmbuf_linearize( 212 ops[i]->sym->m_src); 213 } 214 #endif /* CPERF_LINEARIZATION_ENABLE */ 215 216 /* Enqueue burst of ops on crypto device */ 217 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, 218 ops, burst_size); 219 if (ops_enqd < burst_size) 220 ops_enqd_failed++; 221 222 /** 223 * Calculate number of ops not enqueued (mainly for hw 224 * accelerators whose ingress queue can fill up). 225 */ 226 ops_unused = burst_size - ops_enqd; 227 ops_enqd_total += ops_enqd; 228 229 230 /* Dequeue processed burst of ops from crypto device */ 231 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 232 ops_processed, test_burst_size); 233 234 if (likely(ops_deqd)) { 235 /* Free crypto ops so they can be reused. */ 236 rte_mempool_put_bulk(ctx->pool, 237 (void **)ops_processed, ops_deqd); 238 239 ops_deqd_total += ops_deqd; 240 } else { 241 /** 242 * Count dequeue polls which didn't return any 243 * processed operations. This statistic is mainly 244 * relevant to hw accelerators. 245 */ 246 ops_deqd_failed++; 247 } 248 249 } 250 251 /* Dequeue any operations still in the crypto device */ 252 253 while (ops_deqd_total < ctx->options->total_ops) { 254 /* Sending 0 length burst to flush sw crypto device */ 255 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 256 257 /* dequeue burst */ 258 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 259 ops_processed, test_burst_size); 260 if (ops_deqd == 0) 261 ops_deqd_failed++; 262 else { 263 rte_mempool_put_bulk(ctx->pool, 264 (void **)ops_processed, ops_deqd); 265 ops_deqd_total += ops_deqd; 266 } 267 } 268 269 tsc_end = rte_rdtsc_precise(); 270 tsc_duration = (tsc_end - tsc_start); 271 272 /* Calculate average operations processed per second */ 273 double ops_per_second = ((double)ctx->options->total_ops / 274 tsc_duration) * rte_get_tsc_hz(); 275 276 /* Calculate average throughput (Gbps) in bits per second */ 277 double throughput_gbps = ((ops_per_second * 278 ctx->options->test_buffer_size * 8) / 1000000000); 279 280 /* Calculate average cycles per packet */ 281 double cycles_per_packet = ((double)tsc_duration / 282 ctx->options->total_ops); 283 284 if (!ctx->options->csv) { 285 if (rte_atomic16_test_and_set(&display_once)) 286 printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n", 287 "lcore id", "Buf Size", "Burst Size", 288 "Enqueued", "Dequeued", "Failed Enq", 289 "Failed Deq", "MOps", "Gbps", 290 "Cycles/Buf"); 291 292 printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64 293 "%12"PRIu64"%12.4f%12.4f%12.2f\n", 294 ctx->lcore_id, 295 ctx->options->test_buffer_size, 296 test_burst_size, 297 ops_enqd_total, 298 ops_deqd_total, 299 ops_enqd_failed, 300 ops_deqd_failed, 301 ops_per_second/1000000, 302 throughput_gbps, 303 cycles_per_packet); 304 } else { 305 if (rte_atomic16_test_and_set(&display_once)) 306 printf("#lcore id,Buffer Size(B)," 307 "Burst Size,Enqueued,Dequeued,Failed Enq," 308 "Failed Deq,Ops(Millions),Throughput(Gbps)," 309 "Cycles/Buf\n\n"); 310 311 printf("%u,%u,%u,%"PRIu64",%"PRIu64",%"PRIu64",%"PRIu64"," 312 "%.3f,%.3f,%.3f\n", 313 ctx->lcore_id, 314 ctx->options->test_buffer_size, 315 test_burst_size, 316 ops_enqd_total, 317 ops_deqd_total, 318 ops_enqd_failed, 319 ops_deqd_failed, 320 ops_per_second/1000000, 321 throughput_gbps, 322 cycles_per_packet); 323 } 324 325 /* Get next size from range or list */ 326 if (ctx->options->inc_burst_size != 0) 327 test_burst_size += ctx->options->inc_burst_size; 328 else { 329 if (++burst_size_idx == ctx->options->burst_size_count) 330 break; 331 test_burst_size = ctx->options->burst_size_list[burst_size_idx]; 332 } 333 334 } 335 336 return 0; 337 } 338 339 340 void 341 cperf_throughput_test_destructor(void *arg) 342 { 343 struct cperf_throughput_ctx *ctx = arg; 344 345 if (ctx == NULL) 346 return; 347 348 cperf_throughput_test_free(ctx); 349 } 350