1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <stdlib.h> 6 7 #include <rte_malloc.h> 8 #include <rte_cycles.h> 9 #include <rte_crypto.h> 10 #include <rte_cryptodev.h> 11 12 #include "cperf_test_throughput.h" 13 #include "cperf_ops.h" 14 #include "cperf_test_common.h" 15 16 struct cperf_throughput_ctx { 17 uint8_t dev_id; 18 uint16_t qp_id; 19 uint8_t lcore_id; 20 21 struct rte_mempool *pool; 22 23 void *sess; 24 uint8_t sess_owner; 25 26 cperf_populate_ops_t populate_ops; 27 28 uint32_t src_buf_offset; 29 uint32_t dst_buf_offset; 30 31 const struct cperf_options *options; 32 const struct cperf_test_vector *test_vector; 33 }; 34 35 static void 36 cperf_throughput_test_free(struct cperf_throughput_ctx *ctx) 37 { 38 if (!ctx) 39 return; 40 if (ctx->sess != NULL && ctx->sess_owner) { 41 if (cperf_is_asym_test(ctx->options)) 42 rte_cryptodev_asym_session_free(ctx->dev_id, 43 (void *)ctx->sess); 44 #ifdef RTE_LIB_SECURITY 45 else if (ctx->options->op_type == CPERF_PDCP || 46 ctx->options->op_type == CPERF_DOCSIS || 47 ctx->options->op_type == CPERF_TLS || 48 ctx->options->op_type == CPERF_IPSEC) { 49 void *sec_ctx = rte_cryptodev_get_sec_ctx(ctx->dev_id); 50 51 rte_security_session_destroy(sec_ctx, (void *)ctx->sess); 52 } 53 #endif 54 else 55 rte_cryptodev_sym_session_free(ctx->dev_id, ctx->sess); 56 } 57 rte_mempool_free(ctx->pool); 58 59 rte_free(ctx); 60 } 61 62 void * 63 cperf_throughput_test_constructor(struct rte_mempool *sess_mp, 64 uint8_t dev_id, uint16_t qp_id, 65 const struct cperf_options *options, 66 const struct cperf_test_vector *test_vector, 67 const struct cperf_op_fns *op_fns, 68 void **sess) 69 { 70 struct cperf_throughput_ctx *ctx = NULL; 71 72 ctx = rte_malloc(NULL, sizeof(struct cperf_throughput_ctx), 0); 73 if (ctx == NULL) 74 goto err; 75 76 ctx->dev_id = dev_id; 77 ctx->qp_id = qp_id; 78 79 ctx->populate_ops = op_fns->populate_ops; 80 ctx->options = options; 81 ctx->test_vector = test_vector; 82 83 /* IV goes at the end of the crypto operation */ 84 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 85 sizeof(struct rte_crypto_sym_op); 86 87 if (*sess != NULL) { 88 ctx->sess = *sess; 89 ctx->sess_owner = false; 90 } else { 91 ctx->sess = op_fns->sess_create(sess_mp, dev_id, options, test_vector, 92 iv_offset); 93 if (ctx->sess == NULL) 94 goto err; 95 *sess = ctx->sess; 96 ctx->sess_owner = true; 97 } 98 99 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0, 100 &ctx->src_buf_offset, &ctx->dst_buf_offset, 101 &ctx->pool) < 0) 102 goto err; 103 104 return ctx; 105 err: 106 cperf_throughput_test_free(ctx); 107 108 return NULL; 109 } 110 111 int 112 cperf_throughput_test_runner(void *test_ctx) 113 { 114 struct cperf_throughput_ctx *ctx = test_ctx; 115 uint16_t test_burst_size; 116 uint8_t burst_size_idx = 0; 117 uint32_t imix_idx = 0; 118 119 static RTE_ATOMIC(uint16_t) display_once; 120 121 struct rte_crypto_op *ops[ctx->options->max_burst_size]; 122 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; 123 uint64_t i; 124 125 uint32_t lcore = rte_lcore_id(); 126 127 #ifdef CPERF_LINEARIZATION_ENABLE 128 struct rte_cryptodev_info dev_info; 129 int linearize = 0; 130 131 /* Check if source mbufs require coalescing */ 132 if ((ctx->options->op_type != CPERF_ASYM_MODEX) && 133 (ctx->options->segment_sz < ctx->options->max_buffer_size)) { 134 rte_cryptodev_info_get(ctx->dev_id, &dev_info); 135 if ((dev_info.feature_flags & 136 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0) 137 linearize = 1; 138 } 139 #endif /* CPERF_LINEARIZATION_ENABLE */ 140 141 ctx->lcore_id = lcore; 142 143 /* Warm up the host CPU before starting the test */ 144 for (i = 0; i < ctx->options->total_ops; i++) 145 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 146 147 /* Get first size from range or list */ 148 if (ctx->options->inc_burst_size != 0) 149 test_burst_size = ctx->options->min_burst_size; 150 else 151 test_burst_size = ctx->options->burst_size_list[0]; 152 153 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 154 sizeof(struct rte_crypto_sym_op); 155 156 while (test_burst_size <= ctx->options->max_burst_size) { 157 uint64_t ops_enqd = 0, ops_enqd_total = 0, ops_enqd_failed = 0; 158 uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0; 159 160 uint64_t tsc_start, tsc_end, tsc_duration; 161 162 uint16_t ops_unused = 0; 163 164 tsc_start = rte_rdtsc_precise(); 165 166 while (ops_enqd_total < ctx->options->total_ops) { 167 168 uint16_t burst_size = ((ops_enqd_total + test_burst_size) 169 <= ctx->options->total_ops) ? 170 test_burst_size : 171 ctx->options->total_ops - 172 ops_enqd_total; 173 174 uint16_t ops_needed = burst_size - ops_unused; 175 176 /* Allocate objects containing crypto operations and mbufs */ 177 if (rte_mempool_get_bulk(ctx->pool, (void **)ops, 178 ops_needed) != 0) { 179 RTE_LOG(ERR, USER1, 180 "Failed to allocate more crypto operations " 181 "from the crypto operation pool.\n" 182 "Consider increasing the pool size " 183 "with --pool-sz\n"); 184 return -1; 185 } 186 187 /* Setup crypto op, attach mbuf etc */ 188 (ctx->populate_ops)(ops, ctx->src_buf_offset, 189 ctx->dst_buf_offset, 190 ops_needed, ctx->sess, 191 ctx->options, ctx->test_vector, 192 iv_offset, &imix_idx, &tsc_start); 193 194 /** 195 * When ops_needed is smaller than ops_enqd, the 196 * unused ops need to be moved to the front for 197 * next round use. 198 */ 199 if (unlikely(ops_enqd > ops_needed)) { 200 size_t nb_b_to_mov = ops_unused * sizeof( 201 struct rte_crypto_op *); 202 203 memmove(&ops[ops_needed], &ops[ops_enqd], 204 nb_b_to_mov); 205 } 206 207 #ifdef CPERF_LINEARIZATION_ENABLE 208 if (linearize) { 209 /* PMD doesn't support scatter-gather and source buffer 210 * is segmented. 211 * We need to linearize it before enqueuing. 212 */ 213 for (i = 0; i < burst_size; i++) 214 rte_pktmbuf_linearize( 215 ops[i]->sym->m_src); 216 } 217 #endif /* CPERF_LINEARIZATION_ENABLE */ 218 219 /* Enqueue burst of ops on crypto device */ 220 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, 221 ops, burst_size); 222 if (ops_enqd < burst_size) 223 ops_enqd_failed++; 224 225 /** 226 * Calculate number of ops not enqueued (mainly for hw 227 * accelerators whose ingress queue can fill up). 228 */ 229 ops_unused = burst_size - ops_enqd; 230 ops_enqd_total += ops_enqd; 231 232 233 /* Dequeue processed burst of ops from crypto device */ 234 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 235 ops_processed, test_burst_size); 236 237 if (likely(ops_deqd)) { 238 /* Free crypto ops so they can be reused. */ 239 rte_mempool_put_bulk(ctx->pool, 240 (void **)ops_processed, ops_deqd); 241 242 ops_deqd_total += ops_deqd; 243 } else { 244 /** 245 * Count dequeue polls which didn't return any 246 * processed operations. This statistic is mainly 247 * relevant to hw accelerators. 248 */ 249 ops_deqd_failed++; 250 } 251 252 } 253 254 /* Dequeue any operations still in the crypto device */ 255 256 while (ops_deqd_total < ctx->options->total_ops) { 257 /* Sending 0 length burst to flush sw crypto device */ 258 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 259 260 /* dequeue burst */ 261 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 262 ops_processed, test_burst_size); 263 if (ops_deqd == 0) 264 ops_deqd_failed++; 265 else { 266 rte_mempool_put_bulk(ctx->pool, 267 (void **)ops_processed, ops_deqd); 268 ops_deqd_total += ops_deqd; 269 } 270 } 271 272 tsc_end = rte_rdtsc_precise(); 273 tsc_duration = (tsc_end - tsc_start); 274 275 /* Calculate average operations processed per second */ 276 double ops_per_second = ((double)ctx->options->total_ops / 277 tsc_duration) * rte_get_tsc_hz(); 278 279 /* Calculate average throughput (Gbps) in bits per second */ 280 double throughput_gbps = ((ops_per_second * 281 ctx->options->test_buffer_size * 8) / 1000000000); 282 283 /* Calculate average cycles per packet */ 284 double cycles_per_packet = ((double)tsc_duration / 285 ctx->options->total_ops); 286 287 uint16_t exp = 0; 288 if (!ctx->options->csv) { 289 if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1, 290 rte_memory_order_relaxed, rte_memory_order_relaxed)) 291 printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n", 292 "lcore id", "Buf Size", "Burst Size", 293 "Enqueued", "Dequeued", "Failed Enq", 294 "Failed Deq", "MOps", "Gbps", 295 "Cycles/Buf"); 296 297 printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64 298 "%12"PRIu64"%12.4f%12.4f%12.2f\n", 299 ctx->lcore_id, 300 ctx->options->test_buffer_size, 301 test_burst_size, 302 ops_enqd_total, 303 ops_deqd_total, 304 ops_enqd_failed, 305 ops_deqd_failed, 306 ops_per_second/1000000, 307 throughput_gbps, 308 cycles_per_packet); 309 } else { 310 if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1, 311 rte_memory_order_relaxed, rte_memory_order_relaxed)) 312 printf("#lcore id,Buffer Size(B)," 313 "Burst Size,Enqueued,Dequeued,Failed Enq," 314 "Failed Deq,Ops(Millions),Throughput(Gbps)," 315 "Cycles/Buf\n\n"); 316 317 printf("%u,%u,%u,%"PRIu64",%"PRIu64",%"PRIu64",%"PRIu64"," 318 "%.3f,%.3f,%.3f\n", 319 ctx->lcore_id, 320 ctx->options->test_buffer_size, 321 test_burst_size, 322 ops_enqd_total, 323 ops_deqd_total, 324 ops_enqd_failed, 325 ops_deqd_failed, 326 ops_per_second/1000000, 327 throughput_gbps, 328 cycles_per_packet); 329 } 330 331 /* Get next size from range or list */ 332 if (ctx->options->inc_burst_size != 0) 333 test_burst_size += ctx->options->inc_burst_size; 334 else { 335 if (++burst_size_idx == ctx->options->burst_size_count) 336 break; 337 test_burst_size = ctx->options->burst_size_list[burst_size_idx]; 338 } 339 340 } 341 342 return 0; 343 } 344 345 346 void 347 cperf_throughput_test_destructor(void *arg) 348 { 349 struct cperf_throughput_ctx *ctx = arg; 350 351 if (ctx == NULL) 352 return; 353 354 cperf_throughput_test_free(ctx); 355 } 356