1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_cycles.h> 7 #include <rte_crypto.h> 8 #include <rte_cryptodev.h> 9 10 #include "cperf_test_throughput.h" 11 #include "cperf_ops.h" 12 #include "cperf_test_common.h" 13 14 struct cperf_throughput_ctx { 15 uint8_t dev_id; 16 uint16_t qp_id; 17 uint8_t lcore_id; 18 19 struct rte_mempool *pool; 20 21 struct rte_cryptodev_sym_session *sess; 22 23 cperf_populate_ops_t populate_ops; 24 25 uint32_t src_buf_offset; 26 uint32_t dst_buf_offset; 27 28 const struct cperf_options *options; 29 const struct cperf_test_vector *test_vector; 30 }; 31 32 static void 33 cperf_throughput_test_free(struct cperf_throughput_ctx *ctx) 34 { 35 if (ctx) { 36 if (ctx->sess) { 37 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess); 38 rte_cryptodev_sym_session_free(ctx->sess); 39 } 40 41 if (ctx->pool) 42 rte_mempool_free(ctx->pool); 43 44 rte_free(ctx); 45 } 46 } 47 48 void * 49 cperf_throughput_test_constructor(struct rte_mempool *sess_mp, 50 struct rte_mempool *sess_priv_mp, 51 uint8_t dev_id, uint16_t qp_id, 52 const struct cperf_options *options, 53 const struct cperf_test_vector *test_vector, 54 const struct cperf_op_fns *op_fns) 55 { 56 struct cperf_throughput_ctx *ctx = NULL; 57 58 ctx = rte_malloc(NULL, sizeof(struct cperf_throughput_ctx), 0); 59 if (ctx == NULL) 60 goto err; 61 62 ctx->dev_id = dev_id; 63 ctx->qp_id = qp_id; 64 65 ctx->populate_ops = op_fns->populate_ops; 66 ctx->options = options; 67 ctx->test_vector = test_vector; 68 69 /* IV goes at the end of the crypto operation */ 70 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 71 sizeof(struct rte_crypto_sym_op); 72 73 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, 74 test_vector, iv_offset); 75 if (ctx->sess == NULL) 76 goto err; 77 78 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0, 79 &ctx->src_buf_offset, &ctx->dst_buf_offset, 80 &ctx->pool) < 0) 81 goto err; 82 83 return ctx; 84 err: 85 cperf_throughput_test_free(ctx); 86 87 return NULL; 88 } 89 90 int 91 cperf_throughput_test_runner(void *test_ctx) 92 { 93 struct cperf_throughput_ctx *ctx = test_ctx; 94 uint16_t test_burst_size; 95 uint8_t burst_size_idx = 0; 96 uint32_t imix_idx = 0; 97 98 static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); 99 100 struct rte_crypto_op *ops[ctx->options->max_burst_size]; 101 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; 102 uint64_t i; 103 104 uint32_t lcore = rte_lcore_id(); 105 106 #ifdef CPERF_LINEARIZATION_ENABLE 107 struct rte_cryptodev_info dev_info; 108 int linearize = 0; 109 110 /* Check if source mbufs require coalescing */ 111 if (ctx->options->segment_sz < ctx->options->max_buffer_size) { 112 rte_cryptodev_info_get(ctx->dev_id, &dev_info); 113 if ((dev_info.feature_flags & 114 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0) 115 linearize = 1; 116 } 117 #endif /* CPERF_LINEARIZATION_ENABLE */ 118 119 ctx->lcore_id = lcore; 120 121 /* Warm up the host CPU before starting the test */ 122 for (i = 0; i < ctx->options->total_ops; i++) 123 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 124 125 /* Get first size from range or list */ 126 if (ctx->options->inc_burst_size != 0) 127 test_burst_size = ctx->options->min_burst_size; 128 else 129 test_burst_size = ctx->options->burst_size_list[0]; 130 131 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 132 sizeof(struct rte_crypto_sym_op); 133 134 while (test_burst_size <= ctx->options->max_burst_size) { 135 uint64_t ops_enqd = 0, ops_enqd_total = 0, ops_enqd_failed = 0; 136 uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0; 137 138 uint64_t tsc_start, tsc_end, tsc_duration; 139 140 uint16_t ops_unused = 0; 141 142 tsc_start = rte_rdtsc_precise(); 143 144 while (ops_enqd_total < ctx->options->total_ops) { 145 146 uint16_t burst_size = ((ops_enqd_total + test_burst_size) 147 <= ctx->options->total_ops) ? 148 test_burst_size : 149 ctx->options->total_ops - 150 ops_enqd_total; 151 152 uint16_t ops_needed = burst_size - ops_unused; 153 154 /* Allocate objects containing crypto operations and mbufs */ 155 if (rte_mempool_get_bulk(ctx->pool, (void **)ops, 156 ops_needed) != 0) { 157 RTE_LOG(ERR, USER1, 158 "Failed to allocate more crypto operations " 159 "from the crypto operation pool.\n" 160 "Consider increasing the pool size " 161 "with --pool-sz\n"); 162 return -1; 163 } 164 165 /* Setup crypto op, attach mbuf etc */ 166 (ctx->populate_ops)(ops, ctx->src_buf_offset, 167 ctx->dst_buf_offset, 168 ops_needed, ctx->sess, 169 ctx->options, ctx->test_vector, 170 iv_offset, &imix_idx); 171 172 /** 173 * When ops_needed is smaller than ops_enqd, the 174 * unused ops need to be moved to the front for 175 * next round use. 176 */ 177 if (unlikely(ops_enqd > ops_needed)) { 178 size_t nb_b_to_mov = ops_unused * sizeof( 179 struct rte_crypto_op *); 180 181 memmove(&ops[ops_needed], &ops[ops_enqd], 182 nb_b_to_mov); 183 } 184 185 #ifdef CPERF_LINEARIZATION_ENABLE 186 if (linearize) { 187 /* PMD doesn't support scatter-gather and source buffer 188 * is segmented. 189 * We need to linearize it before enqueuing. 190 */ 191 for (i = 0; i < burst_size; i++) 192 rte_pktmbuf_linearize(ops[i]->sym->m_src); 193 } 194 #endif /* CPERF_LINEARIZATION_ENABLE */ 195 196 /* Enqueue burst of ops on crypto device */ 197 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, 198 ops, burst_size); 199 if (ops_enqd < burst_size) 200 ops_enqd_failed++; 201 202 /** 203 * Calculate number of ops not enqueued (mainly for hw 204 * accelerators whose ingress queue can fill up). 205 */ 206 ops_unused = burst_size - ops_enqd; 207 ops_enqd_total += ops_enqd; 208 209 210 /* Dequeue processed burst of ops from crypto device */ 211 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 212 ops_processed, test_burst_size); 213 214 if (likely(ops_deqd)) { 215 /* Free crypto ops so they can be reused. */ 216 rte_mempool_put_bulk(ctx->pool, 217 (void **)ops_processed, ops_deqd); 218 219 ops_deqd_total += ops_deqd; 220 } else { 221 /** 222 * Count dequeue polls which didn't return any 223 * processed operations. This statistic is mainly 224 * relevant to hw accelerators. 225 */ 226 ops_deqd_failed++; 227 } 228 229 } 230 231 /* Dequeue any operations still in the crypto device */ 232 233 while (ops_deqd_total < ctx->options->total_ops) { 234 /* Sending 0 length burst to flush sw crypto device */ 235 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 236 237 /* dequeue burst */ 238 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 239 ops_processed, test_burst_size); 240 if (ops_deqd == 0) 241 ops_deqd_failed++; 242 else { 243 rte_mempool_put_bulk(ctx->pool, 244 (void **)ops_processed, ops_deqd); 245 ops_deqd_total += ops_deqd; 246 } 247 } 248 249 tsc_end = rte_rdtsc_precise(); 250 tsc_duration = (tsc_end - tsc_start); 251 252 /* Calculate average operations processed per second */ 253 double ops_per_second = ((double)ctx->options->total_ops / 254 tsc_duration) * rte_get_tsc_hz(); 255 256 /* Calculate average throughput (Gbps) in bits per second */ 257 double throughput_gbps = ((ops_per_second * 258 ctx->options->test_buffer_size * 8) / 1000000000); 259 260 /* Calculate average cycles per packet */ 261 double cycles_per_packet = ((double)tsc_duration / 262 ctx->options->total_ops); 263 264 if (!ctx->options->csv) { 265 if (rte_atomic16_test_and_set(&display_once)) 266 printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n", 267 "lcore id", "Buf Size", "Burst Size", 268 "Enqueued", "Dequeued", "Failed Enq", 269 "Failed Deq", "MOps", "Gbps", 270 "Cycles/Buf"); 271 272 printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64 273 "%12"PRIu64"%12.4f%12.4f%12.2f\n", 274 ctx->lcore_id, 275 ctx->options->test_buffer_size, 276 test_burst_size, 277 ops_enqd_total, 278 ops_deqd_total, 279 ops_enqd_failed, 280 ops_deqd_failed, 281 ops_per_second/1000000, 282 throughput_gbps, 283 cycles_per_packet); 284 } else { 285 if (rte_atomic16_test_and_set(&display_once)) 286 printf("#lcore id,Buffer Size(B)," 287 "Burst Size,Enqueued,Dequeued,Failed Enq," 288 "Failed Deq,Ops(Millions),Throughput(Gbps)," 289 "Cycles/Buf\n\n"); 290 291 printf("%u;%u;%u;%"PRIu64";%"PRIu64";%"PRIu64";%"PRIu64";" 292 "%.3f;%.3f;%.3f\n", 293 ctx->lcore_id, 294 ctx->options->test_buffer_size, 295 test_burst_size, 296 ops_enqd_total, 297 ops_deqd_total, 298 ops_enqd_failed, 299 ops_deqd_failed, 300 ops_per_second/1000000, 301 throughput_gbps, 302 cycles_per_packet); 303 } 304 305 /* Get next size from range or list */ 306 if (ctx->options->inc_burst_size != 0) 307 test_burst_size += ctx->options->inc_burst_size; 308 else { 309 if (++burst_size_idx == ctx->options->burst_size_count) 310 break; 311 test_burst_size = ctx->options->burst_size_list[burst_size_idx]; 312 } 313 314 } 315 316 return 0; 317 } 318 319 320 void 321 cperf_throughput_test_destructor(void *arg) 322 { 323 struct cperf_throughput_ctx *ctx = arg; 324 325 if (ctx == NULL) 326 return; 327 328 cperf_throughput_test_free(ctx); 329 } 330