1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_cycles.h> 7 #include <rte_crypto.h> 8 #include <rte_cryptodev.h> 9 10 #include "cperf_test_latency.h" 11 #include "cperf_ops.h" 12 #include "cperf_test_common.h" 13 14 struct cperf_op_result { 15 uint64_t tsc_start; 16 uint64_t tsc_end; 17 enum rte_crypto_op_status status; 18 }; 19 20 struct cperf_latency_ctx { 21 uint8_t dev_id; 22 uint16_t qp_id; 23 uint8_t lcore_id; 24 25 struct rte_mempool *pool; 26 27 void *sess; 28 29 cperf_populate_ops_t populate_ops; 30 31 uint32_t src_buf_offset; 32 uint32_t dst_buf_offset; 33 34 const struct cperf_options *options; 35 const struct cperf_test_vector *test_vector; 36 struct cperf_op_result *res; 37 }; 38 39 struct priv_op_data { 40 struct cperf_op_result *result; 41 }; 42 43 static void 44 cperf_latency_test_free(struct cperf_latency_ctx *ctx) 45 { 46 if (ctx) { 47 if (ctx->sess) 48 rte_cryptodev_sym_session_free(ctx->dev_id, ctx->sess); 49 50 rte_mempool_free(ctx->pool); 51 52 rte_free(ctx->res); 53 rte_free(ctx); 54 } 55 } 56 57 void * 58 cperf_latency_test_constructor(struct rte_mempool *sess_mp, 59 uint8_t dev_id, uint16_t qp_id, 60 const struct cperf_options *options, 61 const struct cperf_test_vector *test_vector, 62 const struct cperf_op_fns *op_fns) 63 { 64 struct cperf_latency_ctx *ctx = NULL; 65 size_t extra_op_priv_size = sizeof(struct priv_op_data); 66 67 ctx = rte_malloc(NULL, sizeof(struct cperf_latency_ctx), 0); 68 if (ctx == NULL) 69 goto err; 70 71 ctx->dev_id = dev_id; 72 ctx->qp_id = qp_id; 73 74 ctx->populate_ops = op_fns->populate_ops; 75 ctx->options = options; 76 ctx->test_vector = test_vector; 77 78 /* IV goes at the end of the crypto operation */ 79 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 80 sizeof(struct rte_crypto_sym_op) + 81 sizeof(struct cperf_op_result *); 82 83 ctx->sess = op_fns->sess_create(sess_mp, dev_id, options, 84 test_vector, iv_offset); 85 if (ctx->sess == NULL) 86 goto err; 87 88 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 89 extra_op_priv_size, 90 &ctx->src_buf_offset, &ctx->dst_buf_offset, 91 &ctx->pool) < 0) 92 goto err; 93 94 ctx->res = rte_malloc(NULL, sizeof(struct cperf_op_result) * 95 ctx->options->total_ops, 0); 96 97 if (ctx->res == NULL) 98 goto err; 99 100 return ctx; 101 err: 102 cperf_latency_test_free(ctx); 103 104 return NULL; 105 } 106 107 static inline void 108 store_timestamp(struct rte_crypto_op *op, uint64_t timestamp) 109 { 110 struct priv_op_data *priv_data; 111 112 priv_data = (struct priv_op_data *) (op->sym + 1); 113 priv_data->result->status = op->status; 114 priv_data->result->tsc_end = timestamp; 115 } 116 117 int 118 cperf_latency_test_runner(void *arg) 119 { 120 struct cperf_latency_ctx *ctx = arg; 121 uint16_t test_burst_size; 122 uint8_t burst_size_idx = 0; 123 uint32_t imix_idx = 0; 124 125 static uint16_t display_once; 126 127 if (ctx == NULL) 128 return 0; 129 130 struct rte_crypto_op *ops[ctx->options->max_burst_size]; 131 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; 132 uint64_t i; 133 struct priv_op_data *priv_data; 134 135 uint32_t lcore = rte_lcore_id(); 136 137 #ifdef CPERF_LINEARIZATION_ENABLE 138 struct rte_cryptodev_info dev_info; 139 int linearize = 0; 140 141 /* Check if source mbufs require coalescing */ 142 if (ctx->options->segment_sz < ctx->options->max_buffer_size) { 143 rte_cryptodev_info_get(ctx->dev_id, &dev_info); 144 if ((dev_info.feature_flags & 145 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0) 146 linearize = 1; 147 } 148 #endif /* CPERF_LINEARIZATION_ENABLE */ 149 150 ctx->lcore_id = lcore; 151 152 /* Warm up the host CPU before starting the test */ 153 for (i = 0; i < ctx->options->total_ops; i++) 154 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 155 156 /* Get first size from range or list */ 157 if (ctx->options->inc_burst_size != 0) 158 test_burst_size = ctx->options->min_burst_size; 159 else 160 test_burst_size = ctx->options->burst_size_list[0]; 161 162 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 163 sizeof(struct rte_crypto_sym_op) + 164 sizeof(struct cperf_op_result *); 165 166 while (test_burst_size <= ctx->options->max_burst_size) { 167 uint64_t ops_enqd = 0, ops_deqd = 0; 168 uint64_t b_idx = 0; 169 170 uint64_t tsc_val, tsc_end, tsc_start; 171 uint64_t tsc_max = 0, tsc_min = ~0UL, tsc_tot = 0, tsc_idx = 0; 172 uint64_t enqd_max = 0, enqd_min = ~0UL, enqd_tot = 0; 173 uint64_t deqd_max = 0, deqd_min = ~0UL, deqd_tot = 0; 174 175 while (enqd_tot < ctx->options->total_ops) { 176 177 uint16_t burst_size = ((enqd_tot + test_burst_size) 178 <= ctx->options->total_ops) ? 179 test_burst_size : 180 ctx->options->total_ops - 181 enqd_tot; 182 183 /* Allocate objects containing crypto operations and mbufs */ 184 if (rte_mempool_get_bulk(ctx->pool, (void **)ops, 185 burst_size) != 0) { 186 RTE_LOG(ERR, USER1, 187 "Failed to allocate more crypto operations " 188 "from the crypto operation pool.\n" 189 "Consider increasing the pool size " 190 "with --pool-sz\n"); 191 return -1; 192 } 193 194 /* Setup crypto op, attach mbuf etc */ 195 (ctx->populate_ops)(ops, ctx->src_buf_offset, 196 ctx->dst_buf_offset, 197 burst_size, ctx->sess, ctx->options, 198 ctx->test_vector, iv_offset, 199 &imix_idx, &tsc_start); 200 201 /* Populate the mbuf with the test vector */ 202 for (i = 0; i < burst_size; i++) 203 cperf_mbuf_set(ops[i]->sym->m_src, 204 ctx->options, 205 ctx->test_vector); 206 207 tsc_start = rte_rdtsc_precise(); 208 209 #ifdef CPERF_LINEARIZATION_ENABLE 210 if (linearize) { 211 /* PMD doesn't support scatter-gather and source buffer 212 * is segmented. 213 * We need to linearize it before enqueuing. 214 */ 215 for (i = 0; i < burst_size; i++) 216 rte_pktmbuf_linearize(ops[i]->sym->m_src); 217 } 218 #endif /* CPERF_LINEARIZATION_ENABLE */ 219 220 /* Enqueue burst of ops on crypto device */ 221 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, 222 ops, burst_size); 223 224 /* Dequeue processed burst of ops from crypto device */ 225 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 226 ops_processed, test_burst_size); 227 228 tsc_end = rte_rdtsc_precise(); 229 230 /* Free memory for not enqueued operations */ 231 if (ops_enqd != burst_size) 232 rte_mempool_put_bulk(ctx->pool, 233 (void **)&ops[ops_enqd], 234 burst_size - ops_enqd); 235 236 for (i = 0; i < ops_enqd; i++) { 237 ctx->res[tsc_idx].tsc_start = tsc_start; 238 /* 239 * Private data structure starts after the end of the 240 * rte_crypto_sym_op structure. 241 */ 242 priv_data = (struct priv_op_data *) (ops[i]->sym + 1); 243 priv_data->result = (void *)&ctx->res[tsc_idx]; 244 tsc_idx++; 245 } 246 247 if (likely(ops_deqd)) { 248 /* Free crypto ops so they can be reused. */ 249 for (i = 0; i < ops_deqd; i++) 250 store_timestamp(ops_processed[i], tsc_end); 251 252 rte_mempool_put_bulk(ctx->pool, 253 (void **)ops_processed, ops_deqd); 254 255 deqd_tot += ops_deqd; 256 deqd_max = RTE_MAX(ops_deqd, deqd_max); 257 deqd_min = RTE_MIN(ops_deqd, deqd_min); 258 } 259 260 enqd_tot += ops_enqd; 261 enqd_max = RTE_MAX(ops_enqd, enqd_max); 262 enqd_min = RTE_MIN(ops_enqd, enqd_min); 263 264 b_idx++; 265 } 266 267 /* Dequeue any operations still in the crypto device */ 268 while (deqd_tot < ctx->options->total_ops) { 269 /* Sending 0 length burst to flush sw crypto device */ 270 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 271 272 /* dequeue burst */ 273 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 274 ops_processed, test_burst_size); 275 276 tsc_end = rte_rdtsc_precise(); 277 278 if (ops_deqd != 0) { 279 for (i = 0; i < ops_deqd; i++) 280 store_timestamp(ops_processed[i], tsc_end); 281 282 rte_mempool_put_bulk(ctx->pool, 283 (void **)ops_processed, ops_deqd); 284 285 deqd_tot += ops_deqd; 286 deqd_max = RTE_MAX(ops_deqd, deqd_max); 287 deqd_min = RTE_MIN(ops_deqd, deqd_min); 288 } 289 } 290 291 for (i = 0; i < tsc_idx; i++) { 292 tsc_val = ctx->res[i].tsc_end - ctx->res[i].tsc_start; 293 tsc_max = RTE_MAX(tsc_val, tsc_max); 294 tsc_min = RTE_MIN(tsc_val, tsc_min); 295 tsc_tot += tsc_val; 296 } 297 298 double time_tot, time_avg, time_max, time_min; 299 300 const uint64_t tunit = 1000000; /* us */ 301 const uint64_t tsc_hz = rte_get_tsc_hz(); 302 303 uint64_t enqd_avg = enqd_tot / b_idx; 304 uint64_t deqd_avg = deqd_tot / b_idx; 305 uint64_t tsc_avg = tsc_tot / tsc_idx; 306 307 time_tot = tunit*(double)(tsc_tot) / tsc_hz; 308 time_avg = tunit*(double)(tsc_avg) / tsc_hz; 309 time_max = tunit*(double)(tsc_max) / tsc_hz; 310 time_min = tunit*(double)(tsc_min) / tsc_hz; 311 312 uint16_t exp = 0; 313 if (ctx->options->csv) { 314 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, 315 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 316 printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, " 317 "cycles, time (us)"); 318 319 for (i = 0; i < ctx->options->total_ops; i++) { 320 321 printf("\n%u,%u,%u,%"PRIu64",%"PRIu64",%.3f", 322 ctx->lcore_id, ctx->options->test_buffer_size, 323 test_burst_size, i + 1, 324 ctx->res[i].tsc_end - ctx->res[i].tsc_start, 325 tunit * (double) (ctx->res[i].tsc_end 326 - ctx->res[i].tsc_start) 327 / tsc_hz); 328 329 } 330 } else { 331 printf("\n# Device %d on lcore %u\n", ctx->dev_id, 332 ctx->lcore_id); 333 printf("\n# total operations: %u", ctx->options->total_ops); 334 printf("\n# Buffer size: %u", ctx->options->test_buffer_size); 335 printf("\n# Burst size: %u", test_burst_size); 336 printf("\n# Number of bursts: %"PRIu64, 337 b_idx); 338 339 printf("\n#"); 340 printf("\n# \t Total\t Average\t " 341 "Maximum\t Minimum"); 342 printf("\n# enqueued\t%12"PRIu64"\t%10"PRIu64"\t" 343 "%10"PRIu64"\t%10"PRIu64, enqd_tot, 344 enqd_avg, enqd_max, enqd_min); 345 printf("\n# dequeued\t%12"PRIu64"\t%10"PRIu64"\t" 346 "%10"PRIu64"\t%10"PRIu64, deqd_tot, 347 deqd_avg, deqd_max, deqd_min); 348 printf("\n# cycles\t%12"PRIu64"\t%10"PRIu64"\t" 349 "%10"PRIu64"\t%10"PRIu64, tsc_tot, 350 tsc_avg, tsc_max, tsc_min); 351 printf("\n# time [us]\t%12.0f\t%10.3f\t%10.3f\t%10.3f", 352 time_tot, time_avg, time_max, time_min); 353 printf("\n\n"); 354 355 } 356 357 /* Get next size from range or list */ 358 if (ctx->options->inc_burst_size != 0) 359 test_burst_size += ctx->options->inc_burst_size; 360 else { 361 if (++burst_size_idx == ctx->options->burst_size_count) 362 break; 363 test_burst_size = 364 ctx->options->burst_size_list[burst_size_idx]; 365 } 366 } 367 368 return 0; 369 } 370 371 void 372 cperf_latency_test_destructor(void *arg) 373 { 374 struct cperf_latency_ctx *ctx = arg; 375 376 if (ctx == NULL) 377 return; 378 379 cperf_latency_test_free(ctx); 380 } 381