1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_cycles.h> 7 #include <rte_crypto.h> 8 #include <rte_cryptodev.h> 9 10 #include "cperf_test_latency.h" 11 #include "cperf_ops.h" 12 #include "cperf_test_common.h" 13 14 struct cperf_op_result { 15 uint64_t tsc_start; 16 uint64_t tsc_end; 17 enum rte_crypto_op_status status; 18 }; 19 20 struct cperf_latency_ctx { 21 uint8_t dev_id; 22 uint16_t qp_id; 23 uint8_t lcore_id; 24 25 struct rte_mempool *pool; 26 27 struct rte_cryptodev_sym_session *sess; 28 29 cperf_populate_ops_t populate_ops; 30 31 uint32_t src_buf_offset; 32 uint32_t dst_buf_offset; 33 34 const struct cperf_options *options; 35 const struct cperf_test_vector *test_vector; 36 struct cperf_op_result *res; 37 }; 38 39 struct priv_op_data { 40 struct cperf_op_result *result; 41 }; 42 43 static void 44 cperf_latency_test_free(struct cperf_latency_ctx *ctx) 45 { 46 if (ctx) { 47 if (ctx->sess) 48 rte_cryptodev_sym_session_free(ctx->dev_id, ctx->sess); 49 50 rte_mempool_free(ctx->pool); 51 52 rte_free(ctx->res); 53 rte_free(ctx); 54 } 55 } 56 57 void * 58 cperf_latency_test_constructor(struct rte_mempool *sess_mp, 59 struct rte_mempool *sess_priv_mp, 60 uint8_t dev_id, uint16_t qp_id, 61 const struct cperf_options *options, 62 const struct cperf_test_vector *test_vector, 63 const struct cperf_op_fns *op_fns) 64 { 65 struct cperf_latency_ctx *ctx = NULL; 66 size_t extra_op_priv_size = sizeof(struct priv_op_data); 67 68 ctx = rte_malloc(NULL, sizeof(struct cperf_latency_ctx), 0); 69 if (ctx == NULL) 70 goto err; 71 72 ctx->dev_id = dev_id; 73 ctx->qp_id = qp_id; 74 75 ctx->populate_ops = op_fns->populate_ops; 76 ctx->options = options; 77 ctx->test_vector = test_vector; 78 79 /* IV goes at the end of the crypto operation */ 80 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 81 sizeof(struct rte_crypto_sym_op) + 82 sizeof(struct cperf_op_result *); 83 84 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, 85 test_vector, iv_offset); 86 if (ctx->sess == NULL) 87 goto err; 88 89 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 90 extra_op_priv_size, 91 &ctx->src_buf_offset, &ctx->dst_buf_offset, 92 &ctx->pool) < 0) 93 goto err; 94 95 ctx->res = rte_malloc(NULL, sizeof(struct cperf_op_result) * 96 ctx->options->total_ops, 0); 97 98 if (ctx->res == NULL) 99 goto err; 100 101 return ctx; 102 err: 103 cperf_latency_test_free(ctx); 104 105 return NULL; 106 } 107 108 static inline void 109 store_timestamp(struct rte_crypto_op *op, uint64_t timestamp) 110 { 111 struct priv_op_data *priv_data; 112 113 priv_data = (struct priv_op_data *) (op->sym + 1); 114 priv_data->result->status = op->status; 115 priv_data->result->tsc_end = timestamp; 116 } 117 118 int 119 cperf_latency_test_runner(void *arg) 120 { 121 struct cperf_latency_ctx *ctx = arg; 122 uint16_t test_burst_size; 123 uint8_t burst_size_idx = 0; 124 uint32_t imix_idx = 0; 125 126 static uint16_t display_once; 127 128 if (ctx == NULL) 129 return 0; 130 131 struct rte_crypto_op *ops[ctx->options->max_burst_size]; 132 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; 133 uint64_t i; 134 struct priv_op_data *priv_data; 135 136 uint32_t lcore = rte_lcore_id(); 137 138 #ifdef CPERF_LINEARIZATION_ENABLE 139 struct rte_cryptodev_info dev_info; 140 int linearize = 0; 141 142 /* Check if source mbufs require coalescing */ 143 if (ctx->options->segment_sz < ctx->options->max_buffer_size) { 144 rte_cryptodev_info_get(ctx->dev_id, &dev_info); 145 if ((dev_info.feature_flags & 146 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0) 147 linearize = 1; 148 } 149 #endif /* CPERF_LINEARIZATION_ENABLE */ 150 151 ctx->lcore_id = lcore; 152 153 /* Warm up the host CPU before starting the test */ 154 for (i = 0; i < ctx->options->total_ops; i++) 155 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 156 157 /* Get first size from range or list */ 158 if (ctx->options->inc_burst_size != 0) 159 test_burst_size = ctx->options->min_burst_size; 160 else 161 test_burst_size = ctx->options->burst_size_list[0]; 162 163 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 164 sizeof(struct rte_crypto_sym_op) + 165 sizeof(struct cperf_op_result *); 166 167 while (test_burst_size <= ctx->options->max_burst_size) { 168 uint64_t ops_enqd = 0, ops_deqd = 0; 169 uint64_t b_idx = 0; 170 171 uint64_t tsc_val, tsc_end, tsc_start; 172 uint64_t tsc_max = 0, tsc_min = ~0UL, tsc_tot = 0, tsc_idx = 0; 173 uint64_t enqd_max = 0, enqd_min = ~0UL, enqd_tot = 0; 174 uint64_t deqd_max = 0, deqd_min = ~0UL, deqd_tot = 0; 175 176 while (enqd_tot < ctx->options->total_ops) { 177 178 uint16_t burst_size = ((enqd_tot + test_burst_size) 179 <= ctx->options->total_ops) ? 180 test_burst_size : 181 ctx->options->total_ops - 182 enqd_tot; 183 184 /* Allocate objects containing crypto operations and mbufs */ 185 if (rte_mempool_get_bulk(ctx->pool, (void **)ops, 186 burst_size) != 0) { 187 RTE_LOG(ERR, USER1, 188 "Failed to allocate more crypto operations " 189 "from the crypto operation pool.\n" 190 "Consider increasing the pool size " 191 "with --pool-sz\n"); 192 return -1; 193 } 194 195 /* Setup crypto op, attach mbuf etc */ 196 (ctx->populate_ops)(ops, ctx->src_buf_offset, 197 ctx->dst_buf_offset, 198 burst_size, ctx->sess, ctx->options, 199 ctx->test_vector, iv_offset, 200 &imix_idx, &tsc_start); 201 202 /* Populate the mbuf with the test vector */ 203 for (i = 0; i < burst_size; i++) 204 cperf_mbuf_set(ops[i]->sym->m_src, 205 ctx->options, 206 ctx->test_vector); 207 208 tsc_start = rte_rdtsc_precise(); 209 210 #ifdef CPERF_LINEARIZATION_ENABLE 211 if (linearize) { 212 /* PMD doesn't support scatter-gather and source buffer 213 * is segmented. 214 * We need to linearize it before enqueuing. 215 */ 216 for (i = 0; i < burst_size; i++) 217 rte_pktmbuf_linearize(ops[i]->sym->m_src); 218 } 219 #endif /* CPERF_LINEARIZATION_ENABLE */ 220 221 /* Enqueue burst of ops on crypto device */ 222 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, 223 ops, burst_size); 224 225 /* Dequeue processed burst of ops from crypto device */ 226 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 227 ops_processed, test_burst_size); 228 229 tsc_end = rte_rdtsc_precise(); 230 231 /* Free memory for not enqueued operations */ 232 if (ops_enqd != burst_size) 233 rte_mempool_put_bulk(ctx->pool, 234 (void **)&ops[ops_enqd], 235 burst_size - ops_enqd); 236 237 for (i = 0; i < ops_enqd; i++) { 238 ctx->res[tsc_idx].tsc_start = tsc_start; 239 /* 240 * Private data structure starts after the end of the 241 * rte_crypto_sym_op structure. 242 */ 243 priv_data = (struct priv_op_data *) (ops[i]->sym + 1); 244 priv_data->result = (void *)&ctx->res[tsc_idx]; 245 tsc_idx++; 246 } 247 248 if (likely(ops_deqd)) { 249 /* Free crypto ops so they can be reused. */ 250 for (i = 0; i < ops_deqd; i++) 251 store_timestamp(ops_processed[i], tsc_end); 252 253 rte_mempool_put_bulk(ctx->pool, 254 (void **)ops_processed, ops_deqd); 255 256 deqd_tot += ops_deqd; 257 deqd_max = RTE_MAX(ops_deqd, deqd_max); 258 deqd_min = RTE_MIN(ops_deqd, deqd_min); 259 } 260 261 enqd_tot += ops_enqd; 262 enqd_max = RTE_MAX(ops_enqd, enqd_max); 263 enqd_min = RTE_MIN(ops_enqd, enqd_min); 264 265 b_idx++; 266 } 267 268 /* Dequeue any operations still in the crypto device */ 269 while (deqd_tot < ctx->options->total_ops) { 270 /* Sending 0 length burst to flush sw crypto device */ 271 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 272 273 /* dequeue burst */ 274 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 275 ops_processed, test_burst_size); 276 277 tsc_end = rte_rdtsc_precise(); 278 279 if (ops_deqd != 0) { 280 for (i = 0; i < ops_deqd; i++) 281 store_timestamp(ops_processed[i], tsc_end); 282 283 rte_mempool_put_bulk(ctx->pool, 284 (void **)ops_processed, ops_deqd); 285 286 deqd_tot += ops_deqd; 287 deqd_max = RTE_MAX(ops_deqd, deqd_max); 288 deqd_min = RTE_MIN(ops_deqd, deqd_min); 289 } 290 } 291 292 for (i = 0; i < tsc_idx; i++) { 293 tsc_val = ctx->res[i].tsc_end - ctx->res[i].tsc_start; 294 tsc_max = RTE_MAX(tsc_val, tsc_max); 295 tsc_min = RTE_MIN(tsc_val, tsc_min); 296 tsc_tot += tsc_val; 297 } 298 299 double time_tot, time_avg, time_max, time_min; 300 301 const uint64_t tunit = 1000000; /* us */ 302 const uint64_t tsc_hz = rte_get_tsc_hz(); 303 304 uint64_t enqd_avg = enqd_tot / b_idx; 305 uint64_t deqd_avg = deqd_tot / b_idx; 306 uint64_t tsc_avg = tsc_tot / tsc_idx; 307 308 time_tot = tunit*(double)(tsc_tot) / tsc_hz; 309 time_avg = tunit*(double)(tsc_avg) / tsc_hz; 310 time_max = tunit*(double)(tsc_max) / tsc_hz; 311 time_min = tunit*(double)(tsc_min) / tsc_hz; 312 313 uint16_t exp = 0; 314 if (ctx->options->csv) { 315 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, 316 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 317 printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, " 318 "cycles, time (us)"); 319 320 for (i = 0; i < ctx->options->total_ops; i++) { 321 322 printf("\n%u,%u,%u,%"PRIu64",%"PRIu64",%.3f", 323 ctx->lcore_id, ctx->options->test_buffer_size, 324 test_burst_size, i + 1, 325 ctx->res[i].tsc_end - ctx->res[i].tsc_start, 326 tunit * (double) (ctx->res[i].tsc_end 327 - ctx->res[i].tsc_start) 328 / tsc_hz); 329 330 } 331 } else { 332 printf("\n# Device %d on lcore %u\n", ctx->dev_id, 333 ctx->lcore_id); 334 printf("\n# total operations: %u", ctx->options->total_ops); 335 printf("\n# Buffer size: %u", ctx->options->test_buffer_size); 336 printf("\n# Burst size: %u", test_burst_size); 337 printf("\n# Number of bursts: %"PRIu64, 338 b_idx); 339 340 printf("\n#"); 341 printf("\n# \t Total\t Average\t " 342 "Maximum\t Minimum"); 343 printf("\n# enqueued\t%12"PRIu64"\t%10"PRIu64"\t" 344 "%10"PRIu64"\t%10"PRIu64, enqd_tot, 345 enqd_avg, enqd_max, enqd_min); 346 printf("\n# dequeued\t%12"PRIu64"\t%10"PRIu64"\t" 347 "%10"PRIu64"\t%10"PRIu64, deqd_tot, 348 deqd_avg, deqd_max, deqd_min); 349 printf("\n# cycles\t%12"PRIu64"\t%10"PRIu64"\t" 350 "%10"PRIu64"\t%10"PRIu64, tsc_tot, 351 tsc_avg, tsc_max, tsc_min); 352 printf("\n# time [us]\t%12.0f\t%10.3f\t%10.3f\t%10.3f", 353 time_tot, time_avg, time_max, time_min); 354 printf("\n\n"); 355 356 } 357 358 /* Get next size from range or list */ 359 if (ctx->options->inc_burst_size != 0) 360 test_burst_size += ctx->options->inc_burst_size; 361 else { 362 if (++burst_size_idx == ctx->options->burst_size_count) 363 break; 364 test_burst_size = 365 ctx->options->burst_size_list[burst_size_idx]; 366 } 367 } 368 369 return 0; 370 } 371 372 void 373 cperf_latency_test_destructor(void *arg) 374 { 375 struct cperf_latency_ctx *ctx = arg; 376 377 if (ctx == NULL) 378 return; 379 380 cperf_latency_test_free(ctx); 381 } 382