xref: /dpdk/app/test-crypto-perf/cperf_test_latency.c (revision 54140461b60485941da282d8da2db2f2bc19e281)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2016-2017 Intel Corporation
3  */
4 
5 #include <rte_malloc.h>
6 #include <rte_cycles.h>
7 #include <rte_crypto.h>
8 #include <rte_cryptodev.h>
9 
10 #include "cperf_test_latency.h"
11 #include "cperf_ops.h"
12 #include "cperf_test_common.h"
13 
14 struct cperf_op_result {
15 	uint64_t tsc_start;
16 	uint64_t tsc_end;
17 	enum rte_crypto_op_status status;
18 };
19 
20 struct cperf_latency_ctx {
21 	uint8_t dev_id;
22 	uint16_t qp_id;
23 	uint8_t lcore_id;
24 
25 	struct rte_mempool *pool;
26 
27 	void *sess;
28 
29 	cperf_populate_ops_t populate_ops;
30 
31 	uint32_t src_buf_offset;
32 	uint32_t dst_buf_offset;
33 
34 	const struct cperf_options *options;
35 	const struct cperf_test_vector *test_vector;
36 	struct cperf_op_result *res;
37 };
38 
39 struct priv_op_data {
40 	struct cperf_op_result *result;
41 };
42 
43 static void
44 cperf_latency_test_free(struct cperf_latency_ctx *ctx)
45 {
46 	if (ctx == NULL)
47 		return;
48 
49 	if (ctx->sess != NULL) {
50 		if (ctx->options->op_type == CPERF_ASYM_MODEX)
51 			rte_cryptodev_asym_session_free(ctx->dev_id, ctx->sess);
52 #ifdef RTE_LIB_SECURITY
53 		else if (ctx->options->op_type == CPERF_PDCP ||
54 			 ctx->options->op_type == CPERF_DOCSIS ||
55 			 ctx->options->op_type == CPERF_IPSEC) {
56 			void *sec_ctx = rte_cryptodev_get_sec_ctx(ctx->dev_id);
57 			rte_security_session_destroy(sec_ctx, ctx->sess);
58 		}
59 #endif
60 		else
61 			rte_cryptodev_sym_session_free(ctx->dev_id, ctx->sess);
62 	}
63 
64 	rte_mempool_free(ctx->pool);
65 	rte_free(ctx->res);
66 	rte_free(ctx);
67 }
68 
69 void *
70 cperf_latency_test_constructor(struct rte_mempool *sess_mp,
71 		uint8_t dev_id, uint16_t qp_id,
72 		const struct cperf_options *options,
73 		const struct cperf_test_vector *test_vector,
74 		const struct cperf_op_fns *op_fns)
75 {
76 	struct cperf_latency_ctx *ctx = NULL;
77 	size_t extra_op_priv_size = sizeof(struct priv_op_data);
78 
79 	ctx = rte_malloc(NULL, sizeof(struct cperf_latency_ctx), 0);
80 	if (ctx == NULL)
81 		goto err;
82 
83 	ctx->dev_id = dev_id;
84 	ctx->qp_id = qp_id;
85 
86 	ctx->populate_ops = op_fns->populate_ops;
87 	ctx->options = options;
88 	ctx->test_vector = test_vector;
89 
90 	/* IV goes at the end of the crypto operation */
91 	uint16_t iv_offset = sizeof(struct rte_crypto_op) +
92 		sizeof(struct rte_crypto_sym_op) +
93 		sizeof(struct cperf_op_result *);
94 
95 	ctx->sess = op_fns->sess_create(sess_mp, dev_id, options,
96 			test_vector, iv_offset);
97 	if (ctx->sess == NULL)
98 		goto err;
99 
100 	if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id,
101 			extra_op_priv_size,
102 			&ctx->src_buf_offset, &ctx->dst_buf_offset,
103 			&ctx->pool) < 0)
104 		goto err;
105 
106 	ctx->res = rte_malloc(NULL, sizeof(struct cperf_op_result) *
107 			ctx->options->total_ops, 0);
108 
109 	if (ctx->res == NULL)
110 		goto err;
111 
112 	return ctx;
113 err:
114 	cperf_latency_test_free(ctx);
115 
116 	return NULL;
117 }
118 
119 static inline void
120 store_timestamp(struct rte_crypto_op *op, uint64_t timestamp)
121 {
122 	struct priv_op_data *priv_data;
123 
124 	priv_data = (struct priv_op_data *) (op->sym + 1);
125 	priv_data->result->status = op->status;
126 	priv_data->result->tsc_end = timestamp;
127 }
128 
129 int
130 cperf_latency_test_runner(void *arg)
131 {
132 	struct cperf_latency_ctx *ctx = arg;
133 	uint16_t test_burst_size;
134 	uint8_t burst_size_idx = 0;
135 	uint32_t imix_idx = 0;
136 	int ret = 0;
137 
138 	static uint16_t display_once;
139 
140 	if (ctx == NULL)
141 		return 0;
142 
143 	struct rte_crypto_op *ops[ctx->options->max_burst_size];
144 	struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
145 	uint64_t i;
146 	struct priv_op_data *priv_data;
147 
148 	uint32_t lcore = rte_lcore_id();
149 
150 #ifdef CPERF_LINEARIZATION_ENABLE
151 	struct rte_cryptodev_info dev_info;
152 	int linearize = 0;
153 
154 	/* Check if source mbufs require coalescing */
155 	if (ctx->options->segment_sz < ctx->options->max_buffer_size) {
156 		rte_cryptodev_info_get(ctx->dev_id, &dev_info);
157 		if ((dev_info.feature_flags &
158 				RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0)
159 			linearize = 1;
160 	}
161 #endif /* CPERF_LINEARIZATION_ENABLE */
162 
163 	ctx->lcore_id = lcore;
164 
165 	/* Warm up the host CPU before starting the test */
166 	for (i = 0; i < ctx->options->total_ops; i++)
167 		rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
168 
169 	/* Get first size from range or list */
170 	if (ctx->options->inc_burst_size != 0)
171 		test_burst_size = ctx->options->min_burst_size;
172 	else
173 		test_burst_size = ctx->options->burst_size_list[0];
174 
175 	uint16_t iv_offset = sizeof(struct rte_crypto_op) +
176 		sizeof(struct rte_crypto_sym_op) +
177 		sizeof(struct cperf_op_result *);
178 
179 	while (test_burst_size <= ctx->options->max_burst_size) {
180 		uint64_t ops_enqd = 0, ops_deqd = 0;
181 		uint64_t b_idx = 0;
182 
183 		uint64_t tsc_val, tsc_end, tsc_start;
184 		uint64_t tsc_max = 0, tsc_min = ~0UL, tsc_tot = 0, tsc_idx = 0;
185 		uint64_t enqd_max = 0, enqd_min = ~0UL, enqd_tot = 0;
186 		uint64_t deqd_max = 0, deqd_min = ~0UL, deqd_tot = 0;
187 
188 		while (enqd_tot < ctx->options->total_ops) {
189 
190 			uint16_t burst_size = ((enqd_tot + test_burst_size)
191 					<= ctx->options->total_ops) ?
192 							test_burst_size :
193 							ctx->options->total_ops -
194 							enqd_tot;
195 
196 			/* Allocate objects containing crypto operations and mbufs */
197 			if (rte_mempool_get_bulk(ctx->pool, (void **)ops,
198 						burst_size) != 0) {
199 				RTE_LOG(ERR, USER1,
200 					"Failed to allocate more crypto operations "
201 					"from the crypto operation pool.\n"
202 					"Consider increasing the pool size "
203 					"with --pool-sz\n");
204 				return -1;
205 			}
206 
207 			/* Setup crypto op, attach mbuf etc */
208 			(ctx->populate_ops)(ops, ctx->src_buf_offset,
209 					ctx->dst_buf_offset,
210 					burst_size, ctx->sess, ctx->options,
211 					ctx->test_vector, iv_offset,
212 					&imix_idx, &tsc_start);
213 
214 			/* Populate the mbuf with the test vector */
215 			for (i = 0; i < burst_size; i++)
216 				cperf_mbuf_set(ops[i]->sym->m_src,
217 						ctx->options,
218 						ctx->test_vector);
219 
220 			tsc_start = rte_rdtsc_precise();
221 
222 #ifdef CPERF_LINEARIZATION_ENABLE
223 			if (linearize) {
224 				/* PMD doesn't support scatter-gather and source buffer
225 				 * is segmented.
226 				 * We need to linearize it before enqueuing.
227 				 */
228 				for (i = 0; i < burst_size; i++)
229 					rte_pktmbuf_linearize(ops[i]->sym->m_src);
230 			}
231 #endif /* CPERF_LINEARIZATION_ENABLE */
232 
233 			/* Enqueue burst of ops on crypto device */
234 			ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id,
235 					ops, burst_size);
236 
237 			/* Dequeue processed burst of ops from crypto device */
238 			ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
239 					ops_processed, test_burst_size);
240 
241 			tsc_end = rte_rdtsc_precise();
242 
243 			/* Free memory for not enqueued operations */
244 			if (ops_enqd != burst_size)
245 				rte_mempool_put_bulk(ctx->pool,
246 						(void **)&ops[ops_enqd],
247 						burst_size - ops_enqd);
248 
249 			for (i = 0; i < ops_enqd; i++) {
250 				ctx->res[tsc_idx].tsc_start = tsc_start;
251 				/*
252 				 * Private data structure starts after the end of the
253 				 * rte_crypto_sym_op structure.
254 				 */
255 				priv_data = (struct priv_op_data *) (ops[i]->sym + 1);
256 				priv_data->result = (void *)&ctx->res[tsc_idx];
257 				tsc_idx++;
258 			}
259 
260 			if (likely(ops_deqd))  {
261 				for (i = 0; i < ops_deqd; i++) {
262 					struct rte_crypto_op *op = ops_processed[i];
263 
264 					if (op->status != RTE_CRYPTO_OP_STATUS_SUCCESS)
265 						ret = -1;
266 
267 					store_timestamp(ops_processed[i], tsc_end);
268 				}
269 
270 				/* Free crypto ops so they can be reused. */
271 				rte_mempool_put_bulk(ctx->pool,
272 						(void **)ops_processed, ops_deqd);
273 
274 				deqd_tot += ops_deqd;
275 				deqd_max = RTE_MAX(ops_deqd, deqd_max);
276 				deqd_min = RTE_MIN(ops_deqd, deqd_min);
277 			}
278 
279 			enqd_tot += ops_enqd;
280 			enqd_max = RTE_MAX(ops_enqd, enqd_max);
281 			enqd_min = RTE_MIN(ops_enqd, enqd_min);
282 
283 			b_idx++;
284 		}
285 
286 		/* Dequeue any operations still in the crypto device */
287 		while (deqd_tot < ctx->options->total_ops) {
288 			/* Sending 0 length burst to flush sw crypto device */
289 			rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
290 
291 			/* dequeue burst */
292 			ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
293 					ops_processed, test_burst_size);
294 
295 			tsc_end = rte_rdtsc_precise();
296 
297 			if (ops_deqd != 0) {
298 				for (i = 0; i < ops_deqd; i++) {
299 					struct rte_crypto_op *op = ops_processed[i];
300 
301 					if (op->status != RTE_CRYPTO_OP_STATUS_SUCCESS)
302 						ret = -1;
303 
304 					store_timestamp(ops_processed[i], tsc_end);
305 				}
306 
307 				rte_mempool_put_bulk(ctx->pool,
308 						(void **)ops_processed, ops_deqd);
309 
310 				deqd_tot += ops_deqd;
311 				deqd_max = RTE_MAX(ops_deqd, deqd_max);
312 				deqd_min = RTE_MIN(ops_deqd, deqd_min);
313 			}
314 		}
315 
316 		/* If there was any failure in crypto op, exit */
317 		if (ret)
318 			return ret;
319 
320 		for (i = 0; i < tsc_idx; i++) {
321 			tsc_val = ctx->res[i].tsc_end - ctx->res[i].tsc_start;
322 			tsc_max = RTE_MAX(tsc_val, tsc_max);
323 			tsc_min = RTE_MIN(tsc_val, tsc_min);
324 			tsc_tot += tsc_val;
325 		}
326 
327 		double time_tot, time_avg, time_max, time_min;
328 
329 		const uint64_t tunit = 1000000; /* us */
330 		const uint64_t tsc_hz = rte_get_tsc_hz();
331 
332 		uint64_t enqd_avg = enqd_tot / b_idx;
333 		uint64_t deqd_avg = deqd_tot / b_idx;
334 		uint64_t tsc_avg = tsc_tot / tsc_idx;
335 
336 		time_tot = tunit*(double)(tsc_tot) / tsc_hz;
337 		time_avg = tunit*(double)(tsc_avg) / tsc_hz;
338 		time_max = tunit*(double)(tsc_max) / tsc_hz;
339 		time_min = tunit*(double)(tsc_min) / tsc_hz;
340 
341 		uint16_t exp = 0;
342 		if (ctx->options->csv) {
343 			if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
344 					__ATOMIC_RELAXED, __ATOMIC_RELAXED))
345 				printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, "
346 						"cycles, time (us)");
347 
348 			for (i = 0; i < ctx->options->total_ops; i++) {
349 
350 				printf("\n%u,%u,%u,%"PRIu64",%"PRIu64",%.3f",
351 					ctx->lcore_id, ctx->options->test_buffer_size,
352 					test_burst_size, i + 1,
353 					ctx->res[i].tsc_end - ctx->res[i].tsc_start,
354 					tunit * (double) (ctx->res[i].tsc_end
355 							- ctx->res[i].tsc_start)
356 						/ tsc_hz);
357 
358 			}
359 		} else {
360 			printf("\n# Device %d on lcore %u\n", ctx->dev_id,
361 				ctx->lcore_id);
362 			printf("\n# total operations: %u", ctx->options->total_ops);
363 			printf("\n# Buffer size: %u", ctx->options->test_buffer_size);
364 			printf("\n# Burst size: %u", test_burst_size);
365 			printf("\n#     Number of bursts: %"PRIu64,
366 					b_idx);
367 
368 			printf("\n#");
369 			printf("\n#          \t       Total\t   Average\t   "
370 					"Maximum\t   Minimum");
371 			printf("\n#  enqueued\t%12"PRIu64"\t%10"PRIu64"\t"
372 					"%10"PRIu64"\t%10"PRIu64, enqd_tot,
373 					enqd_avg, enqd_max, enqd_min);
374 			printf("\n#  dequeued\t%12"PRIu64"\t%10"PRIu64"\t"
375 					"%10"PRIu64"\t%10"PRIu64, deqd_tot,
376 					deqd_avg, deqd_max, deqd_min);
377 			printf("\n#    cycles\t%12"PRIu64"\t%10"PRIu64"\t"
378 					"%10"PRIu64"\t%10"PRIu64, tsc_tot,
379 					tsc_avg, tsc_max, tsc_min);
380 			printf("\n# time [us]\t%12.0f\t%10.3f\t%10.3f\t%10.3f",
381 					time_tot, time_avg, time_max, time_min);
382 			printf("\n\n");
383 
384 		}
385 
386 		/* Get next size from range or list */
387 		if (ctx->options->inc_burst_size != 0)
388 			test_burst_size += ctx->options->inc_burst_size;
389 		else {
390 			if (++burst_size_idx == ctx->options->burst_size_count)
391 				break;
392 			test_burst_size =
393 				ctx->options->burst_size_list[burst_size_idx];
394 		}
395 	}
396 
397 	return 0;
398 }
399 
400 void
401 cperf_latency_test_destructor(void *arg)
402 {
403 	struct cperf_latency_ctx *ctx = arg;
404 
405 	if (ctx == NULL)
406 		return;
407 
408 	cperf_latency_test_free(ctx);
409 }
410