1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2016-2017 Intel Corporation 3 */ 4 5 #include <rte_malloc.h> 6 #include <rte_cycles.h> 7 #include <rte_crypto.h> 8 #include <rte_cryptodev.h> 9 10 #include "cperf_test_latency.h" 11 #include "cperf_ops.h" 12 #include "cperf_test_common.h" 13 14 struct cperf_op_result { 15 uint64_t tsc_start; 16 uint64_t tsc_end; 17 enum rte_crypto_op_status status; 18 }; 19 20 struct cperf_latency_ctx { 21 uint8_t dev_id; 22 uint16_t qp_id; 23 uint8_t lcore_id; 24 25 struct rte_mempool *pool; 26 27 struct rte_cryptodev_sym_session *sess; 28 29 cperf_populate_ops_t populate_ops; 30 31 uint32_t src_buf_offset; 32 uint32_t dst_buf_offset; 33 34 const struct cperf_options *options; 35 const struct cperf_test_vector *test_vector; 36 struct cperf_op_result *res; 37 }; 38 39 struct priv_op_data { 40 struct cperf_op_result *result; 41 }; 42 43 #define max(a, b) (a > b ? (uint64_t)a : (uint64_t)b) 44 #define min(a, b) (a < b ? (uint64_t)a : (uint64_t)b) 45 46 static void 47 cperf_latency_test_free(struct cperf_latency_ctx *ctx) 48 { 49 if (ctx) { 50 if (ctx->sess) { 51 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess); 52 rte_cryptodev_sym_session_free(ctx->sess); 53 } 54 55 if (ctx->pool) 56 rte_mempool_free(ctx->pool); 57 58 rte_free(ctx->res); 59 rte_free(ctx); 60 } 61 } 62 63 void * 64 cperf_latency_test_constructor(struct rte_mempool *sess_mp, 65 struct rte_mempool *sess_priv_mp, 66 uint8_t dev_id, uint16_t qp_id, 67 const struct cperf_options *options, 68 const struct cperf_test_vector *test_vector, 69 const struct cperf_op_fns *op_fns) 70 { 71 struct cperf_latency_ctx *ctx = NULL; 72 size_t extra_op_priv_size = sizeof(struct priv_op_data); 73 74 ctx = rte_malloc(NULL, sizeof(struct cperf_latency_ctx), 0); 75 if (ctx == NULL) 76 goto err; 77 78 ctx->dev_id = dev_id; 79 ctx->qp_id = qp_id; 80 81 ctx->populate_ops = op_fns->populate_ops; 82 ctx->options = options; 83 ctx->test_vector = test_vector; 84 85 /* IV goes at the end of the crypto operation */ 86 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 87 sizeof(struct rte_crypto_sym_op) + 88 sizeof(struct cperf_op_result *); 89 90 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, 91 test_vector, iv_offset); 92 if (ctx->sess == NULL) 93 goto err; 94 95 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 96 extra_op_priv_size, 97 &ctx->src_buf_offset, &ctx->dst_buf_offset, 98 &ctx->pool) < 0) 99 goto err; 100 101 ctx->res = rte_malloc(NULL, sizeof(struct cperf_op_result) * 102 ctx->options->total_ops, 0); 103 104 if (ctx->res == NULL) 105 goto err; 106 107 return ctx; 108 err: 109 cperf_latency_test_free(ctx); 110 111 return NULL; 112 } 113 114 static inline void 115 store_timestamp(struct rte_crypto_op *op, uint64_t timestamp) 116 { 117 struct priv_op_data *priv_data; 118 119 priv_data = (struct priv_op_data *) (op->sym + 1); 120 priv_data->result->status = op->status; 121 priv_data->result->tsc_end = timestamp; 122 } 123 124 int 125 cperf_latency_test_runner(void *arg) 126 { 127 struct cperf_latency_ctx *ctx = arg; 128 uint16_t test_burst_size; 129 uint8_t burst_size_idx = 0; 130 uint32_t imix_idx = 0; 131 132 static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); 133 134 if (ctx == NULL) 135 return 0; 136 137 struct rte_crypto_op *ops[ctx->options->max_burst_size]; 138 struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; 139 uint64_t i; 140 struct priv_op_data *priv_data; 141 142 uint32_t lcore = rte_lcore_id(); 143 144 #ifdef CPERF_LINEARIZATION_ENABLE 145 struct rte_cryptodev_info dev_info; 146 int linearize = 0; 147 148 /* Check if source mbufs require coalescing */ 149 if (ctx->options->segment_sz < ctx->options->max_buffer_size) { 150 rte_cryptodev_info_get(ctx->dev_id, &dev_info); 151 if ((dev_info.feature_flags & 152 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0) 153 linearize = 1; 154 } 155 #endif /* CPERF_LINEARIZATION_ENABLE */ 156 157 ctx->lcore_id = lcore; 158 159 /* Warm up the host CPU before starting the test */ 160 for (i = 0; i < ctx->options->total_ops; i++) 161 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 162 163 /* Get first size from range or list */ 164 if (ctx->options->inc_burst_size != 0) 165 test_burst_size = ctx->options->min_burst_size; 166 else 167 test_burst_size = ctx->options->burst_size_list[0]; 168 169 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 170 sizeof(struct rte_crypto_sym_op) + 171 sizeof(struct cperf_op_result *); 172 173 while (test_burst_size <= ctx->options->max_burst_size) { 174 uint64_t ops_enqd = 0, ops_deqd = 0; 175 uint64_t b_idx = 0; 176 177 uint64_t tsc_val, tsc_end, tsc_start; 178 uint64_t tsc_max = 0, tsc_min = ~0UL, tsc_tot = 0, tsc_idx = 0; 179 uint64_t enqd_max = 0, enqd_min = ~0UL, enqd_tot = 0; 180 uint64_t deqd_max = 0, deqd_min = ~0UL, deqd_tot = 0; 181 182 while (enqd_tot < ctx->options->total_ops) { 183 184 uint16_t burst_size = ((enqd_tot + test_burst_size) 185 <= ctx->options->total_ops) ? 186 test_burst_size : 187 ctx->options->total_ops - 188 enqd_tot; 189 190 /* Allocate objects containing crypto operations and mbufs */ 191 if (rte_mempool_get_bulk(ctx->pool, (void **)ops, 192 burst_size) != 0) { 193 RTE_LOG(ERR, USER1, 194 "Failed to allocate more crypto operations " 195 "from the crypto operation pool.\n" 196 "Consider increasing the pool size " 197 "with --pool-sz\n"); 198 return -1; 199 } 200 201 /* Setup crypto op, attach mbuf etc */ 202 (ctx->populate_ops)(ops, ctx->src_buf_offset, 203 ctx->dst_buf_offset, 204 burst_size, ctx->sess, ctx->options, 205 ctx->test_vector, iv_offset, 206 &imix_idx); 207 208 tsc_start = rte_rdtsc_precise(); 209 210 #ifdef CPERF_LINEARIZATION_ENABLE 211 if (linearize) { 212 /* PMD doesn't support scatter-gather and source buffer 213 * is segmented. 214 * We need to linearize it before enqueuing. 215 */ 216 for (i = 0; i < burst_size; i++) 217 rte_pktmbuf_linearize(ops[i]->sym->m_src); 218 } 219 #endif /* CPERF_LINEARIZATION_ENABLE */ 220 221 /* Enqueue burst of ops on crypto device */ 222 ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, 223 ops, burst_size); 224 225 /* Dequeue processed burst of ops from crypto device */ 226 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 227 ops_processed, test_burst_size); 228 229 tsc_end = rte_rdtsc_precise(); 230 231 /* Free memory for not enqueued operations */ 232 if (ops_enqd != burst_size) 233 rte_mempool_put_bulk(ctx->pool, 234 (void **)&ops[ops_enqd], 235 burst_size - ops_enqd); 236 237 for (i = 0; i < ops_enqd; i++) { 238 ctx->res[tsc_idx].tsc_start = tsc_start; 239 /* 240 * Private data structure starts after the end of the 241 * rte_crypto_sym_op structure. 242 */ 243 priv_data = (struct priv_op_data *) (ops[i]->sym + 1); 244 priv_data->result = (void *)&ctx->res[tsc_idx]; 245 tsc_idx++; 246 } 247 248 if (likely(ops_deqd)) { 249 /* Free crypto ops so they can be reused. */ 250 for (i = 0; i < ops_deqd; i++) 251 store_timestamp(ops_processed[i], tsc_end); 252 253 rte_mempool_put_bulk(ctx->pool, 254 (void **)ops_processed, ops_deqd); 255 256 deqd_tot += ops_deqd; 257 deqd_max = max(ops_deqd, deqd_max); 258 deqd_min = min(ops_deqd, deqd_min); 259 } 260 261 enqd_tot += ops_enqd; 262 enqd_max = max(ops_enqd, enqd_max); 263 enqd_min = min(ops_enqd, enqd_min); 264 265 b_idx++; 266 } 267 268 /* Dequeue any operations still in the crypto device */ 269 while (deqd_tot < ctx->options->total_ops) { 270 /* Sending 0 length burst to flush sw crypto device */ 271 rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0); 272 273 /* dequeue burst */ 274 ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id, 275 ops_processed, test_burst_size); 276 277 tsc_end = rte_rdtsc_precise(); 278 279 if (ops_deqd != 0) { 280 for (i = 0; i < ops_deqd; i++) 281 store_timestamp(ops_processed[i], tsc_end); 282 283 rte_mempool_put_bulk(ctx->pool, 284 (void **)ops_processed, ops_deqd); 285 286 deqd_tot += ops_deqd; 287 deqd_max = max(ops_deqd, deqd_max); 288 deqd_min = min(ops_deqd, deqd_min); 289 } 290 } 291 292 for (i = 0; i < tsc_idx; i++) { 293 tsc_val = ctx->res[i].tsc_end - ctx->res[i].tsc_start; 294 tsc_max = max(tsc_val, tsc_max); 295 tsc_min = min(tsc_val, tsc_min); 296 tsc_tot += tsc_val; 297 } 298 299 double time_tot, time_avg, time_max, time_min; 300 301 const uint64_t tunit = 1000000; /* us */ 302 const uint64_t tsc_hz = rte_get_tsc_hz(); 303 304 uint64_t enqd_avg = enqd_tot / b_idx; 305 uint64_t deqd_avg = deqd_tot / b_idx; 306 uint64_t tsc_avg = tsc_tot / tsc_idx; 307 308 time_tot = tunit*(double)(tsc_tot) / tsc_hz; 309 time_avg = tunit*(double)(tsc_avg) / tsc_hz; 310 time_max = tunit*(double)(tsc_max) / tsc_hz; 311 time_min = tunit*(double)(tsc_min) / tsc_hz; 312 313 if (ctx->options->csv) { 314 if (rte_atomic16_test_and_set(&display_once)) 315 printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, " 316 "Packet Size, cycles, time (us)"); 317 318 for (i = 0; i < ctx->options->total_ops; i++) { 319 320 printf("\n%u;%u;%u;%"PRIu64";%"PRIu64";%.3f", 321 ctx->lcore_id, ctx->options->test_buffer_size, 322 test_burst_size, i + 1, 323 ctx->res[i].tsc_end - ctx->res[i].tsc_start, 324 tunit * (double) (ctx->res[i].tsc_end 325 - ctx->res[i].tsc_start) 326 / tsc_hz); 327 328 } 329 } else { 330 printf("\n# Device %d on lcore %u\n", ctx->dev_id, 331 ctx->lcore_id); 332 printf("\n# total operations: %u", ctx->options->total_ops); 333 printf("\n# Buffer size: %u", ctx->options->test_buffer_size); 334 printf("\n# Burst size: %u", test_burst_size); 335 printf("\n# Number of bursts: %"PRIu64, 336 b_idx); 337 338 printf("\n#"); 339 printf("\n# \t Total\t Average\t " 340 "Maximum\t Minimum"); 341 printf("\n# enqueued\t%12"PRIu64"\t%10"PRIu64"\t" 342 "%10"PRIu64"\t%10"PRIu64, enqd_tot, 343 enqd_avg, enqd_max, enqd_min); 344 printf("\n# dequeued\t%12"PRIu64"\t%10"PRIu64"\t" 345 "%10"PRIu64"\t%10"PRIu64, deqd_tot, 346 deqd_avg, deqd_max, deqd_min); 347 printf("\n# cycles\t%12"PRIu64"\t%10"PRIu64"\t" 348 "%10"PRIu64"\t%10"PRIu64, tsc_tot, 349 tsc_avg, tsc_max, tsc_min); 350 printf("\n# time [us]\t%12.0f\t%10.3f\t%10.3f\t%10.3f", 351 time_tot, time_avg, time_max, time_min); 352 printf("\n\n"); 353 354 } 355 356 /* Get next size from range or list */ 357 if (ctx->options->inc_burst_size != 0) 358 test_burst_size += ctx->options->inc_burst_size; 359 else { 360 if (++burst_size_idx == ctx->options->burst_size_count) 361 break; 362 test_burst_size = 363 ctx->options->burst_size_list[burst_size_idx]; 364 } 365 } 366 367 return 0; 368 } 369 370 void 371 cperf_latency_test_destructor(void *arg) 372 { 373 struct cperf_latency_ctx *ctx = arg; 374 375 if (ctx == NULL) 376 return; 377 378 cperf_latency_test_free(ctx); 379 } 380