1 /* 2 * PowerPC 64 definition 3 * forsyth@vitanuova.com 4 */ 5 #include <u.h> 6 #include <libc.h> 7 #include <bio.h> 8 #include "/power64/include/ureg.h" 9 #include <mach.h> 10 11 12 #define REGOFF(x) offsetof(struct Ureg, x) 13 14 #define R31 REGOFF(r31) 15 #define FP_REG(x) (R31+4+8*(x)) 16 17 #define REGSIZE sizeof(struct Ureg) 18 #define FPREGSIZE (8*33) 19 20 Reglist power64reglist[] = { 21 {"CAUSE", REGOFF(cause), RINT|RRDONLY, 'Y'}, 22 {"TRAP", REGOFF(cause), RINT|RRDONLY, 'Y'}, /* alias for acid */ 23 // {"MSR", REGOFF(msr), RINT|RRDONLY, 'Y'}, 24 {"PC", REGOFF(pc), RINT, 'Y'}, 25 {"LR", REGOFF(lr), RINT, 'Y'}, 26 {"CR", REGOFF(cr), RINT, 'X'}, 27 {"XER", REGOFF(xer), RINT, 'Y'}, 28 {"CTR", REGOFF(ctr), RINT, 'Y'}, 29 {"PC", REGOFF(pc), RINT, 'Y'}, 30 {"SP", REGOFF(sp), RINT, 'Y'}, 31 {"R0", REGOFF(r0), RINT, 'Y'}, 32 /* R1 is SP */ 33 {"R2", REGOFF(r2), RINT, 'Y'}, 34 {"R3", REGOFF(r3), RINT, 'Y'}, 35 {"R4", REGOFF(r4), RINT, 'Y'}, 36 {"R5", REGOFF(r5), RINT, 'Y'}, 37 {"R6", REGOFF(r6), RINT, 'Y'}, 38 {"R7", REGOFF(r7), RINT, 'Y'}, 39 {"R8", REGOFF(r8), RINT, 'Y'}, 40 {"R9", REGOFF(r9), RINT, 'Y'}, 41 {"R10", REGOFF(r10), RINT, 'Y'}, 42 {"R11", REGOFF(r11), RINT, 'Y'}, 43 {"R12", REGOFF(r12), RINT, 'Y'}, 44 {"R13", REGOFF(r13), RINT, 'Y'}, 45 {"R14", REGOFF(r14), RINT, 'Y'}, 46 {"R15", REGOFF(r15), RINT, 'Y'}, 47 {"R16", REGOFF(r16), RINT, 'Y'}, 48 {"R17", REGOFF(r17), RINT, 'Y'}, 49 {"R18", REGOFF(r18), RINT, 'Y'}, 50 {"R19", REGOFF(r19), RINT, 'Y'}, 51 {"R20", REGOFF(r20), RINT, 'Y'}, 52 {"R21", REGOFF(r21), RINT, 'Y'}, 53 {"R22", REGOFF(r22), RINT, 'Y'}, 54 {"R23", REGOFF(r23), RINT, 'Y'}, 55 {"R24", REGOFF(r24), RINT, 'Y'}, 56 {"R25", REGOFF(r25), RINT, 'Y'}, 57 {"R26", REGOFF(r26), RINT, 'Y'}, 58 {"R27", REGOFF(r27), RINT, 'Y'}, 59 {"R28", REGOFF(r28), RINT, 'Y'}, 60 {"R29", REGOFF(r29), RINT, 'Y'}, 61 {"R30", REGOFF(r30), RINT, 'Y'}, 62 {"R31", REGOFF(r31), RINT, 'Y'}, 63 {"F0", FP_REG(0), RFLT, 'F'}, 64 {"F1", FP_REG(1), RFLT, 'F'}, 65 {"F2", FP_REG(2), RFLT, 'F'}, 66 {"F3", FP_REG(3), RFLT, 'F'}, 67 {"F4", FP_REG(4), RFLT, 'F'}, 68 {"F5", FP_REG(5), RFLT, 'F'}, 69 {"F6", FP_REG(6), RFLT, 'F'}, 70 {"F7", FP_REG(7), RFLT, 'F'}, 71 {"F8", FP_REG(8), RFLT, 'F'}, 72 {"F9", FP_REG(9), RFLT, 'F'}, 73 {"F10", FP_REG(10), RFLT, 'F'}, 74 {"F11", FP_REG(11), RFLT, 'F'}, 75 {"F12", FP_REG(12), RFLT, 'F'}, 76 {"F13", FP_REG(13), RFLT, 'F'}, 77 {"F14", FP_REG(14), RFLT, 'F'}, 78 {"F15", FP_REG(15), RFLT, 'F'}, 79 {"F16", FP_REG(16), RFLT, 'F'}, 80 {"F17", FP_REG(17), RFLT, 'F'}, 81 {"F18", FP_REG(18), RFLT, 'F'}, 82 {"F19", FP_REG(19), RFLT, 'F'}, 83 {"F20", FP_REG(20), RFLT, 'F'}, 84 {"F21", FP_REG(21), RFLT, 'F'}, 85 {"F22", FP_REG(22), RFLT, 'F'}, 86 {"F23", FP_REG(23), RFLT, 'F'}, 87 {"F24", FP_REG(24), RFLT, 'F'}, 88 {"F25", FP_REG(25), RFLT, 'F'}, 89 {"F26", FP_REG(26), RFLT, 'F'}, 90 {"F27", FP_REG(27), RFLT, 'F'}, 91 {"F28", FP_REG(28), RFLT, 'F'}, 92 {"F29", FP_REG(29), RFLT, 'F'}, 93 {"F30", FP_REG(30), RFLT, 'F'}, 94 {"F31", FP_REG(31), RFLT, 'F'}, 95 {"FPSCR", FP_REG(32)+4, RFLT, 'X'}, 96 { 0 } 97 }; 98 99 /* the machine description */ 100 Mach mpower64 = 101 { 102 "power64", 103 MPOWER64, /* machine type */ 104 power64reglist, /* register set */ 105 REGSIZE, /* number of bytes in register set */ 106 FPREGSIZE, /* number of bytes in FP register set */ 107 "PC", /* name of PC */ 108 "SP", /* name of SP */ 109 "LR", /* name of link register */ 110 "setSB", /* static base register name */ 111 0, /* value */ 112 0x100000, /* page size (TODO, too many choices) */ 113 0xffffffff80000000ull, /* kernel base (TODO, likely incorrect) */ 114 0xf000000000000000ull, /* kernel text mask (TODO, likely incorrect) */ 115 0x00007ffffff00000ull, /* user stack top (TODO, likely incorrect) */ 116 4, /* quantization of pc */ 117 8, /* szaddr */ 118 8, /* szreg */ 119 4, /* szfloat */ 120 8, /* szdouble */ 121 }; 122