1*3de6a9c0SDavid du Colombiersee §5.4.40 (p.142) pllx_* (2 regs) 2*3de6a9c0SDavid du Colombier 3*3de6a9c0SDavid du Colombierout of u-boot, these are the settings: 4*3de6a9c0SDavid du Colombier--- 5*3de6a9c0SDavid du Colombierpllx base 0x4003e80c: 6*3de6a9c0SDavid du Colombier enabled, no locked 7*3de6a9c0SDavid du Colombier divp == 0 (post divider == 2^0 == 1) 8*3de6a9c0SDavid du Colombier divn == 1000 (feedback divider) 9*3de6a9c0SDavid du Colombier divm == 12 (input divider) 10*3de6a9c0SDavid du Colombier misc 0x100: pllx_cpcon == 1 [ should be 12 ] 11*3de6a9c0SDavid du Colombiersuper cclk divider 0x80000000: 12*3de6a9c0SDavid du Colombier enabled 13*3de6a9c0SDavid du Colombier dividend == 0 (thus 1) 14*3de6a9c0SDavid du Colombier divisor == 0 (thus 1) 15*3de6a9c0SDavid du Colombiersuper sclk divider 0x0: 16*3de6a9c0SDavid du Colombier disabled 17*3de6a9c0SDavid du Colombier dividend == 0 (thus 1) 18*3de6a9c0SDavid du Colombier divisor == 0 (thus 1) 19*3de6a9c0SDavid du Colombier--- 20