1This is a preliminary Plan 9 port to the Compulab Trimslice, 2containing a Tegra 2 SoC: a dual-core, (truly) dual-issue 1GHz 3Cortex-A9 v7a-architecture ARM system, *and* it comes in a case. VFP 43 floating-point hardware is present, but 5l doesn't yet generate 5those instructions. This is the first multiprocessor ARM port we've 6done, and much of the code should be reusable in future ports. There 7are still things to be done but it can run both processors and is 8believed to have adequate kernel support for VFP 3 floating-point. 9 10 11What's implemented. 12 13Two cpus running concurrently with level 1 and 2 caches enabled. 14 15Realtek 8168 Ethernet. A slightly dimmer 8169. Has to be jabbed with 16an electric cattle prod by software about once per day when it wedges. 17 18Profiling. Charles Forsyth fixed various bugs to make user-mode 19profiling on ARMs work for the first time ever. 20 21 22What's not (yet) implemented. 23 24USB. It probably just needs initialisation. 25 26NOR flash. 27 28Video. 29 30VFP3 floating point. The go 5l generates VFP 3 floating-point 31instructions (among other changes). Attempts to transplant just that 32code into our 5l failed to generate correct code. Eventually someone 33will get this to work, and then we'll be able to use the hardware 34floating-point. [Eventually someone did, thanks.] Even with only 35software emulation of floating-point, astro runs in under 3 seconds. 36 37In-line 64-bit arithmetic in 5[cl]. 38 39And the really horrid peripherals: NAND flash and MMC. 40 41 42Known problems. 43 44kprof. kprof profiling doesn't work correctly, charging all CPU time 45to _start. 46 47Reboot. After an fshalt -r reboot (or two) with cpu1 enabled, 48accesses to pci registers (notably 0x80015000) in the newly-loaded 49kernel often hang. One of three watchdogs' reset should jolt the 50system back to life and force a reboot through u-boot when this 51happens. Sometimes the ethernet goes dead instead ("waiting for 52dhcp..." forever); this could be a different symptom of pci illness. 53 54Also following a reboot, cpu1's local (not tegra SoC shared) timers 55don't interrupt. Since the local watchdogs don't seem to actually 56interrupt nor generate resets when used in anger (as opposed to 57boot-time check-out), their loss is merely a mystery. The local timer 58not interrupting is more worrying. 59