1 2TEXT setfcr(SB), $4 3 XORL $(0x3F<<7),RARG /* bits are cleared in csr to enable them */ 4 ANDL $0xFFC0, RARG /* just the fcr bits */ 5 WAIT /* is this needed? */ 6 STMXCSR 0(SP) 7 MOVL 0(SP), AX 8 ANDL $~0x3F, AX 9 ORL RARG, AX 10 MOVL AX, 0(SP) 11 LDMXCSR 0(SP) 12 RET 13 14TEXT getfcr(SB), $4 15 WAIT 16 STMXCSR 0(SP) 17 MOVWLZX 0(SP), AX 18 ANDL $0xFFC0, AX 19 XORL $(0x3F<<7),AX 20 RET 21 22TEXT getfsr(SB), $4 23 WAIT 24 STMXCSR 0(SP) 25 MOVL 0(SP), AX 26 ANDL $0x3F, AX 27 RET 28 29TEXT setfsr(SB), $4 30 ANDL $0x3F, RARG 31 WAIT 32 STMXCSR 0(SP) 33 MOVL 0(SP), AX 34 ANDL $~0x3F, AX 35 ORL RARG, AX 36 MOVL AX, 0(SP) 37 LDMXCSR 0(SP) 38 RET 39