1 /* $OpenBSD: if_atw_pci.c,v 1.20 2024/05/24 06:02:53 jsg Exp $ */
2 /* $NetBSD: if_atw_pci.c,v 1.7 2004/07/23 07:07:55 dyoung Exp $ */
3
4 /*-
5 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center; Charles M. Hannum; and David Young.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip.
36 *
37 * Derived from the ``Tulip'' PCI bus front-end.
38 */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43
44 #include <net/if.h>
45 #include <net/if_media.h>
46 #include <netinet/in.h>
47 #include <netinet/if_ether.h>
48
49 #include <net80211/ieee80211_radiotap.h>
50 #include <net80211/ieee80211_var.h>
51
52 #include <machine/bus.h>
53 #include <machine/intr.h>
54
55 #include <dev/ic/atwreg.h>
56 #include <dev/ic/atwvar.h>
57
58 #include <dev/pci/pcivar.h>
59 #include <dev/pci/pcireg.h>
60 #include <dev/pci/pcidevs.h>
61
62 /*
63 * PCI configuration space registers used by the ADM8211.
64 */
65 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
66 #define ATW_PCI_MMBA 0x14 /* memory mapped base */
67
68 struct atw_pci_softc {
69 struct atw_softc psc_atw; /* real ADM8211 softc */
70
71 pci_intr_handle_t psc_ih; /* interrupt handle */
72 void *psc_intrcookie;
73
74 pci_chipset_tag_t psc_pc; /* our PCI chipset */
75 pcitag_t psc_pcitag; /* our PCI tag */
76 };
77
78 int atw_pci_match(struct device *, void *, void *);
79 void atw_pci_attach(struct device *, struct device *, void *);
80 int atw_pci_detach(struct device *, int);
81
82 const struct cfattach atw_pci_ca = {
83 sizeof (struct atw_softc), atw_pci_match, atw_pci_attach, atw_pci_detach,
84 atw_activate
85 };
86
87 const struct pci_matchid atw_pci_devices[] = {
88 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211 },
89 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRSHPW796 }
90 };
91
92 int
atw_pci_match(struct device * parent,void * match,void * aux)93 atw_pci_match(struct device *parent, void *match, void *aux)
94 {
95 return (pci_matchbyid((struct pci_attach_args *)aux, atw_pci_devices,
96 nitems(atw_pci_devices)));
97 }
98
99 static int
atw_pci_enable(struct atw_softc * sc)100 atw_pci_enable(struct atw_softc *sc)
101 {
102 struct atw_pci_softc *psc = (void *)sc;
103
104 /* Establish the interrupt. */
105 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih,
106 IPL_NET, atw_intr, sc, sc->sc_dev.dv_xname);
107 if (psc->psc_intrcookie == NULL) {
108 printf("%s: unable to establish interrupt\n",
109 sc->sc_dev.dv_xname);
110 return (1);
111 }
112
113 return (0);
114 }
115
116 static void
atw_pci_disable(struct atw_softc * sc)117 atw_pci_disable(struct atw_softc *sc)
118 {
119 struct atw_pci_softc *psc = (void *)sc;
120
121 /* Unhook the interrupt handler. */
122 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie);
123 psc->psc_intrcookie = NULL;
124 }
125
126 void
atw_pci_attach(struct device * parent,struct device * self,void * aux)127 atw_pci_attach(struct device *parent, struct device *self, void *aux)
128 {
129 struct atw_pci_softc *psc = (void *) self;
130 struct atw_softc *sc = &psc->psc_atw;
131 struct pci_attach_args *pa = aux;
132 pci_chipset_tag_t pc = pa->pa_pc;
133 const char *intrstr = NULL;
134 bus_space_tag_t iot, memt;
135 bus_space_handle_t ioh, memh;
136 bus_size_t iosize, memsize;
137 int ioh_valid, memh_valid;
138
139 psc->psc_pc = pa->pa_pc;
140 psc->psc_pcitag = pa->pa_tag;
141
142 /*
143 * No power management hooks.
144 * XXX Maybe we should add some!
145 */
146 sc->sc_flags |= ATWF_ENABLED;
147
148 /*
149 * Get revision info, and set some chip-specific variables.
150 */
151 sc->sc_rev = PCI_REVISION(pa->pa_class);
152
153 /*
154 * Check to see if the device is in power-save mode, and
155 * being it out if necessary.
156 *
157 * XXX This code comes almost verbatim from if_tlp_pci.c. I do
158 * not understand it. Tulip clears the "sleep mode" bit in the
159 * CFDA register, first. There is an equivalent (?) register at the
160 * same place in the ADM8211, but the docs do not assign its bits
161 * any meanings. -dcy
162 */
163 pci_set_powerstate(pc, pa->pa_tag, PCI_PMCSR_STATE_D0);
164
165 /*
166 * Map the device.
167 */
168 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA,
169 PCI_MAPREG_TYPE_IO, 0,
170 &iot, &ioh, NULL, &iosize, 0) == 0);
171 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA,
172 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
173 &memt, &memh, NULL, &memsize, 0) == 0);
174
175 if (memh_valid) {
176 sc->sc_st = memt;
177 sc->sc_sh = memh;
178 sc->sc_mapsize = memsize;
179 } else if (ioh_valid) {
180 sc->sc_st = iot;
181 sc->sc_sh = ioh;
182 sc->sc_mapsize = iosize;
183 } else {
184 printf(": unable to map device registers\n");
185 return;
186 }
187
188 sc->sc_dmat = pa->pa_dmat;
189
190 /*
191 * Get the cacheline size.
192 */
193 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
194 PCI_BHLC_REG));
195
196 /*
197 * Get PCI data moving command info.
198 */
199 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */
200 sc->sc_flags |= ATWF_MRL;
201 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */
202 sc->sc_flags |= ATWF_MRM;
203 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */
204 sc->sc_flags |= ATWF_MWI;
205
206 /*
207 * Map and establish our interrupt.
208 */
209 if (pci_intr_map(pa, &psc->psc_ih)) {
210 printf(": unable to map interrupt\n");
211 return;
212 }
213 intrstr = pci_intr_string(pc, psc->psc_ih);
214 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET,
215 atw_intr, sc, sc->sc_dev.dv_xname);
216 if (psc->psc_intrcookie == NULL) {
217 printf(": unable to establish interrupt");
218 if (intrstr != NULL)
219 printf(" at %s", intrstr);
220 printf("\n");
221 return;
222 }
223
224 printf(": %s\n", intrstr);
225
226 sc->sc_enable = atw_pci_enable;
227 sc->sc_disable = atw_pci_disable;
228
229 /*
230 * Finish off the attach.
231 */
232 atw_attach(sc);
233 }
234
235 int
atw_pci_detach(struct device * self,int flags)236 atw_pci_detach(struct device *self, int flags)
237 {
238 struct atw_pci_softc *psc = (void *)self;
239 struct atw_softc *sc = &psc->psc_atw;
240 int rv;
241
242 rv = atw_detach(sc);
243 if (rv)
244 return (rv);
245
246 if (psc->psc_intrcookie != NULL)
247 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie);
248
249 bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_mapsize);
250
251 return (0);
252 }
253