1 /* $OpenBSD: ciss_pci.c,v 1.23 2024/05/24 06:02:53 jsg Exp $ */
2
3 /*
4 * Copyright (c) 2005 Michael Shalayeff
5 * All rights reserved.
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <sys/param.h>
21 #include <sys/systm.h>
22 #include <sys/device.h>
23
24 #include <dev/pci/pcidevs.h>
25 #include <dev/pci/pcivar.h>
26
27 #include <machine/bus.h>
28
29 #include <scsi/scsi_all.h>
30 #include <scsi/scsi_disk.h>
31 #include <scsi/scsiconf.h>
32
33 #include <dev/ic/cissreg.h>
34 #include <dev/ic/cissvar.h>
35
36 #define CISS_BAR 0x10
37
38 int ciss_pci_match(struct device *, void *, void *);
39 void ciss_pci_attach(struct device *, struct device *, void *);
40 int ciss_activate(struct device *, int);
41
42 const struct cfattach ciss_pci_ca = {
43 sizeof(struct ciss_softc), ciss_pci_match, ciss_pci_attach,
44 NULL, ciss_activate
45 };
46
47 const struct pci_matchid ciss_pci_devices[] = {
48 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA532 },
49 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300 },
50 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300_2 },
51 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5312 },
52 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5I },
53 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5I_2 },
54 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6I },
55 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA641 },
56 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA642 },
57 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400 },
58 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400EM },
59 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6422 },
60 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA64XX },
61 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200 },
62 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_1 },
63 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_2 },
64 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_3 },
65 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_4 },
66 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE500_1 },
67 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE500_2 },
68 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAH240 },
69 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAH240AR },
70 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAH240TR },
71 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAH241 },
72 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAH244BR },
73 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP212 },
74 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP220I },
75 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP222 },
76 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP224BR },
77 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP230I },
78 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP240TR },
79 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP246BR },
80 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP410 },
81 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP410I },
82 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP411 },
83 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP420 },
84 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP420I },
85 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP421 },
86 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP430 },
87 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP430I },
88 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP431 },
89 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP440 },
90 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP440AR },
91 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP441 },
92 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP530 },
93 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP531 },
94 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP542T },
95 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP600 },
96 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP700M },
97 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP711M },
98 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP712M },
99 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP721M },
100 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP731M },
101 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP741M },
102 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP800 },
103 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP812 },
104 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP822 },
105 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP830 },
106 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP830I },
107 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP840 },
108 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP841 },
109 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAV100 },
110 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_1 },
111 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_2 },
112 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_3 },
113 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_4 },
114 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_5 },
115 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_6 },
116 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_7 },
117 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_8 },
118 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_9 },
119 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_10 },
120 { PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_11 }
121 };
122
123 int
ciss_pci_match(struct device * parent,void * match,void * aux)124 ciss_pci_match(struct device *parent, void *match, void *aux)
125 {
126 struct pci_attach_args *pa = aux;
127
128 return pci_matchbyid(pa, ciss_pci_devices, nitems(ciss_pci_devices));
129 }
130
131 void
ciss_pci_attach(struct device * parent,struct device * self,void * aux)132 ciss_pci_attach(struct device *parent, struct device *self, void *aux)
133 {
134 struct ciss_softc *sc = (struct ciss_softc *)self;
135 struct pci_attach_args *pa = aux;
136 bus_size_t size, cfgsz;
137 pci_intr_handle_t ih;
138 const char *intrstr;
139 int cfg_bar, memtype;
140 pcireg_t reg;
141
142 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, CISS_BAR);
143 if (pci_mapreg_map(pa, CISS_BAR, memtype, 0,
144 &sc->iot, &sc->ioh, NULL, &size, 0)) {
145 printf(": can't map controller mem space\n");
146 return;
147 }
148 sc->dmat = pa->pa_dmat;
149
150 sc->iem = CISS_READYENA;
151 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
152 if (PCI_VENDOR(reg) == PCI_VENDOR_COMPAQ &&
153 (PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5I ||
154 PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA532 ||
155 PCI_PRODUCT(reg) == PCI_PRODUCT_COMPAQ_CSA5312))
156 sc->iem = CISS_READYENAB;
157
158 cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR);
159 sc->cfgoff = bus_space_read_4(sc->iot, sc->ioh, CISS_CFG_OFF);
160 if (cfg_bar != CISS_BAR) {
161 if (pci_mapreg_map(pa, cfg_bar, PCI_MAPREG_TYPE_MEM, 0,
162 NULL, &sc->cfg_ioh, NULL, &cfgsz, 0)) {
163 printf(": can't map controller config space\n");
164 bus_space_unmap(sc->iot, sc->ioh, size);
165 return;
166 }
167 } else {
168 sc->cfg_ioh = sc->ioh;
169 cfgsz = size;
170 }
171
172 if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) {
173 printf(": unfit config space\n");
174 bus_space_unmap(sc->iot, sc->ioh, size);
175 if (cfg_bar != CISS_BAR)
176 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
177 return;
178 }
179
180 /* disable interrupts until ready */
181 bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
182 bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem);
183
184 if (pci_intr_map(pa, &ih)) {
185 printf(": can't map interrupt\n");
186 bus_space_unmap(sc->iot, sc->ioh, size);
187 if (cfg_bar != CISS_BAR)
188 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
189 return;
190 }
191 intrstr = pci_intr_string(pa->pa_pc, ih);
192 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc,
193 sc->sc_dev.dv_xname);
194 if (!sc->sc_ih) {
195 printf(": can't establish interrupt");
196 if (intrstr)
197 printf(" at %s", intrstr);
198 printf("\n");
199 bus_space_unmap(sc->iot, sc->ioh, size);
200 if (cfg_bar != CISS_BAR)
201 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
202 return;
203 }
204
205 printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname);
206
207 if (ciss_attach(sc)) {
208 pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
209 sc->sc_ih = NULL;
210 bus_space_unmap(sc->iot, sc->ioh, size);
211 if (cfg_bar != CISS_BAR)
212 bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
213 return;
214 }
215
216 /* enable interrupts now */
217 bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
218 bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem);
219 }
220
221 int
ciss_activate(struct device * self,int act)222 ciss_activate(struct device *self, int act)
223 {
224 int ret = 0;
225
226 ret = config_activate_children(self, act);
227
228 switch (act) {
229 case DVACT_POWERDOWN:
230 ciss_shutdown(self);
231 break;
232 }
233
234 return (ret);
235 }
236