1 /* $OpenBSD: cac_pci.c,v 1.19 2024/05/24 06:02:53 jsg Exp $ */
2 /* $NetBSD: cac_pci.c,v 1.10 2001/01/10 16:48:04 ad Exp $ */
3
4 /*-
5 * Copyright (c) 2000 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Andrew Doran.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * PCI front-end for cac(4) driver.
35 */
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40 #include <sys/queue.h>
41 #include <sys/sensors.h>
42
43 #include <machine/bus.h>
44
45 #include <dev/pci/pcidevs.h>
46 #include <dev/pci/pcivar.h>
47
48 #include <scsi/scsi_all.h>
49 #include <scsi/scsi_disk.h>
50 #include <scsi/scsiconf.h>
51
52 #include <dev/ic/cacreg.h>
53 #include <dev/ic/cacvar.h>
54
55 void cac_pci_attach(struct device *, struct device *, void *);
56 const struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *);
57 int cac_pci_match(struct device *, void *, void *);
58 int cac_activate(struct device *, int);
59
60 struct cac_ccb *cac_pci_l0_completed(struct cac_softc *);
61 int cac_pci_l0_fifo_full(struct cac_softc *);
62 void cac_pci_l0_intr_enable(struct cac_softc *, int);
63 int cac_pci_l0_intr_pending(struct cac_softc *);
64 void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *);
65
66 const struct cfattach cac_pci_ca = {
67 sizeof(struct cac_softc), cac_pci_match, cac_pci_attach
68 };
69
70 static const struct cac_linkage cac_pci_l0 = {
71 cac_pci_l0_completed,
72 cac_pci_l0_fifo_full,
73 cac_pci_l0_intr_enable,
74 cac_pci_l0_intr_pending,
75 cac_pci_l0_submit
76 };
77
78 #define CT_STARTFW 0x01 /* Need to start controller firmware */
79
80 static const
81 struct cac_pci_type {
82 int ct_subsysid;
83 int ct_flags;
84 const struct cac_linkage *ct_linkage;
85 char *ct_typestr;
86 } cac_pci_type[] = {
87 { 0x40300e11, 0, &cac_l0, "SMART-2/P" },
88 { 0x40310e11, 0, &cac_l0, "SMART-2SL" },
89 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" },
90 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" },
91 { 0x40340e11, 0, &cac_l0, "Smart Array 221" },
92 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" },
93 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" },
94 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" },
95 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" },
96 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" },
97 };
98
99 static const
100 struct cac_pci_product {
101 u_short cp_vendor;
102 u_short cp_product;
103 } cac_pci_product[] = {
104 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P },
105 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 },
106 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 },
107 };
108
109 const struct cac_pci_type *
cac_pci_findtype(struct pci_attach_args * pa)110 cac_pci_findtype(struct pci_attach_args *pa)
111 {
112 const struct cac_pci_type *ct;
113 const struct cac_pci_product *cp;
114 pcireg_t subsysid;
115 int i;
116
117 cp = cac_pci_product;
118 i = 0;
119 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) {
120 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor &&
121 PCI_PRODUCT(pa->pa_id) == cp->cp_product)
122 break;
123 cp++;
124 i++;
125 }
126 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0]))
127 return (NULL);
128
129 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
130 ct = cac_pci_type;
131 i = 0;
132 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) {
133 if (subsysid == ct->ct_subsysid)
134 break;
135 ct++;
136 i++;
137 }
138 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0]))
139 return (NULL);
140
141 return (ct);
142 }
143
144 int
cac_pci_match(struct device * parent,void * match,void * aux)145 cac_pci_match(struct device *parent, void *match, void *aux)
146 {
147
148 return (cac_pci_findtype(aux) != NULL);
149 }
150
151 void
cac_pci_attach(struct device * parent,struct device * self,void * aux)152 cac_pci_attach(struct device *parent, struct device *self, void *aux)
153 {
154 struct pci_attach_args *pa;
155 const struct cac_pci_type *ct;
156 struct cac_softc *sc;
157 pci_chipset_tag_t pc;
158 pci_intr_handle_t ih;
159 const char *intrstr;
160 pcireg_t reg;
161 bus_size_t size;
162 int memr, ior, i;
163
164 sc = (struct cac_softc *)self;
165 pa = (struct pci_attach_args *)aux;
166 pc = pa->pa_pc;
167 ct = cac_pci_findtype(pa);
168
169 /*
170 * Map the PCI register window.
171 */
172 memr = -1;
173 ior = -1;
174
175 for (i = 0x10; i <= 0x14; i += 4) {
176 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
177
178 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
179 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
180 ior = i;
181 } else {
182 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
183 memr = i;
184 }
185 }
186
187 if (memr != -1) {
188 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
189 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0))
190 memr = -1;
191 else
192 ior = -1;
193 }
194 if (ior != -1)
195 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
196 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0))
197 ior = -1;
198 if (memr == -1 && ior == -1) {
199 printf(": can't map i/o or memory space\n");
200 return;
201 }
202
203 sc->sc_dmat = pa->pa_dmat;
204
205 /* Map and establish the interrupt. */
206 if (pci_intr_map(pa, &ih)) {
207 printf(": can't map interrupt\n");
208 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
209 return;
210 }
211 intrstr = pci_intr_string(pc, ih);
212 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr,
213 sc, sc->sc_dv.dv_xname);
214 if (sc->sc_ih == NULL) {
215 printf(": can't establish interrupt");
216 if (intrstr != NULL)
217 printf(" at %s", intrstr);
218 printf("\n");
219 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
220 return;
221 }
222
223 printf(": %s, %s\n", intrstr, ct->ct_typestr);
224
225 /* Now attach to the bus-independent code. */
226 sc->sc_cl = ct->ct_linkage;
227 cac_init(sc, (ct->ct_flags & CT_STARTFW) != 0);
228 }
229
230 int
cac_activate(struct device * self,int act)231 cac_activate(struct device *self, int act)
232 {
233 struct cac_softc *sc = (struct cac_softc *)self;
234 int ret = 0;
235
236 ret = config_activate_children(self, act);
237
238 switch (act) {
239 case DVACT_POWERDOWN:
240 cac_flush(sc);
241 break;
242 }
243
244 return (ret);
245 }
246
247 void
cac_pci_l0_submit(struct cac_softc * sc,struct cac_ccb * ccb)248 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
249 {
250
251 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
252 sc->sc_dmamap->dm_mapsize,
253 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
254 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr);
255 }
256
257 struct cac_ccb *
cac_pci_l0_completed(struct cac_softc * sc)258 cac_pci_l0_completed(struct cac_softc *sc)
259 {
260 struct cac_ccb *ccb;
261 u_int32_t off;
262
263 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU)
264 return (NULL);
265
266 cac_outl(sc, CAC_42REG_DONE_FIFO, 0);
267 off = (off & ~3) - sc->sc_ccbs_paddr;
268 ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
269
270 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
271 sc->sc_dmamap->dm_mapsize,
272 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
273
274 return (ccb);
275 }
276
277 int
cac_pci_l0_intr_pending(struct cac_softc * sc)278 cac_pci_l0_intr_pending(struct cac_softc *sc)
279 {
280
281 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0);
282 }
283
284 void
cac_pci_l0_intr_enable(struct cac_softc * sc,int state)285 cac_pci_l0_intr_enable(struct cac_softc *sc, int state)
286 {
287
288 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */
289 }
290
291 int
cac_pci_l0_fifo_full(struct cac_softc * sc)292 cac_pci_l0_fifo_full(struct cac_softc *sc)
293 {
294
295 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0);
296 }
297