xref: /openbsd-src/sys/dev/ic/m41t8xreg.h (revision 35cccaaef0891f4e60849b1b78f8a0612497db4e)
1 /*	$OpenBSD: m41t8xreg.h,v 1.3 2020/10/23 20:55:15 patrick Exp $	*/
2 
3 /*
4  * Copyright (c) 2010 Miodrag Vallat.
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 /*
20  * ST M41T8x serial access real time clock registers
21  *
22  * http://www.st.com/stonline/products/literature/ds/9074/m41t80.pdf
23  */
24 
25 /*
26  * Note that register update will stop while accessing registers 0x00 to 0x07
27  * (without the clock stopping), so that the reader does not get false data.
28  * Registers will be thawed after reading register 0x07, when the
29  * autoincrementing read address reaches 0x08.
30  *
31  * Clock and alarm numerical values are stored in BCD. All other values are
32  * stored in binary.
33  */
34 
35 #define	M41T8X_HSEC	0x00		/* 1/100th of second */
36 #define	M41T8X_SEC	0x01		/* second */
37 #define	M41T8X_STOP		0x80	/* stop clock, bit 7 of above */
38 #define	M41T8X_MIN	0x02		/* minute */
39 #define	M41T8X_HR	0x03		/* hour */
40 #define	M41T8X_CEB		0x80	/* century bit toggle enable */
41 #define	M41T8X_CB		0x40	/* century bit */
42 #define	M41T8X_DOW	0x04		/* day of week */
43 #define	M41T8X_DOW_MASK		0x07	/* day of week bits */
44 #define	M41T8X_DAY	0x05		/* day of month */
45 #define	M41T8X_MON	0x06		/* month */
46 #define	M41T8X_YEAR	0x07		/* year */
47 
48 #define	M41T8X_TOD_START	0x00
49 #define	M41T8X_TOD_LENGTH	0x08
50 
51 #define	M41T8X_CTRL	0x08		/* control */
52 #define	M41T8X_OUT		0x80	/* output level */
53 #define	M41T8X_32KHZ	0x09		/* 32KHz oscillator control */
54 #define	M41T8X_32KE		0x80	/* 32KHz enable */
55 
56 #define	M41T8X_ALMON	0x0a		/* alarm month */
57 #define	M41T8X_AFE		0x80	/* alarm flag enable */
58 #define	M41T8X_SQWE		0x40	/* square wave enable */
59 #define	M41T8X_ALDAY	0x0b		/* alarm day */
60 #define	M41T8X_RPT4		0x80	/* alarm repeat mode bits */
61 #define	M41T8X_RPT5		0x40
62 #define	M41T8X_ALHOUR	0x0c		/* alarm hour */
63 #define	M41T8X_RPT3		0x80
64 #define	M41T8X_ALMIN	0x0d		/* alarm minute */
65 #define	M41T8X_RPT2		0x80
66 #define	M41T8X_ALSEC	0x0e		/* alarm second */
67 #define	M41T8X_RPT1		0x80
68 
69 #define	M41T8X_FLAGS	0x0f		/* flags */
70 #define	M41T8X_AF		0x40	/* alarm flag */
71 
72 #define	M41T8X_SQW	0x13		/* square wave control */
73 #define	M41T8X_RS3		0x80	/* square wave frequency */
74 #define	M41T8X_RS2		0x40
75 #define	M41T8X_RS1		0x20
76 #define	M41T8X_RS0		0x10
77 
78 /* alarm repeat settings, RPT5..RPT1 */
79 #define	M41T8X_ALREP_SEC	0x1f	/* once per second */
80 #define	M41T8X_ALREP_MIN	0x1e	/* once per minute */
81 #define	M41T8X_ALREP_HOUR	0x1c	/* once per hour */
82 #define	M41T8X_ALREP_DAY	0x18	/* once per day */
83 #define	M41T8X_ALREP_MON	0x10	/* once per month */
84 #define	M41T8X_ALREP_YEAR	0x00	/* once per year */
85 
86 /* square wave frequency, RS3..RS0 */
87 #define	M41T8X_SQW_32K		0x01
88 #define	M41T8X_SQW_8K		0x02
89 #define	M41T8X_SQW_4K		0x03
90 #define	M41T8X_SQW_2K		0x04
91 #define	M41T8X_SQW_1K		0x05
92 #define	M41T8X_SQW_512		0x06
93 #define	M41T8X_SQW_256		0x07
94 #define	M41T8X_SQW_128		0x08
95 #define	M41T8X_SQW_64		0x09
96 #define	M41T8X_SQW_32		0x0a
97 #define	M41T8X_SQW_16		0x0b
98 #define	M41T8X_SQW_8		0x0c
99 #define	M41T8X_SQW_4		0x0d
100 #define	M41T8X_SQW_2		0x0e
101 #define	M41T8X_SQW_1		0x0f
102