1 /* $OpenBSD: rkiic.c,v 1.7 2021/10/24 17:52:26 mpi Exp $ */
2 /*
3 * Copyright (c) 2017 Mark Kettenis <kettenis@openbsd.org>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <sys/param.h>
19 #include <sys/systm.h>
20 #include <sys/device.h>
21
22 #include <machine/intr.h>
23 #include <machine/bus.h>
24 #include <machine/fdt.h>
25
26 #define _I2C_PRIVATE
27 #include <dev/i2c/i2cvar.h>
28
29 #include <dev/ofw/openfirm.h>
30 #include <dev/ofw/ofw_clock.h>
31 #include <dev/ofw/ofw_misc.h>
32 #include <dev/ofw/ofw_pinctrl.h>
33 #include <dev/ofw/fdt.h>
34
35 /* Registers. */
36 #define RKI2C_CON 0x0000
37 #define RKI2C_CON_ACT2NAK (1 << 6)
38 #define RKI2C_CON_ACK (0 << 5)
39 #define RKI2C_CON_NAK (1 << 5)
40 #define RKI2C_CON_STOP (1 << 4)
41 #define RKI2C_CON_START (1 << 3)
42 #define RKI2C_CON_I2C_MODE_MASK (3 << 1)
43 #define RKI2C_CON_I2C_MODE_TX (0 << 1)
44 #define RKI2C_CON_I2C_MODE_RRX (1 << 1)
45 #define RKI2C_CON_I2C_MODE_RX (2 << 1)
46 #define RKI2C_CON_I2C_MODE_BROKEN (3 << 1)
47 #define RKI2C_CON_I2C_EN (1 << 0)
48 #define RKI2C_CLKDIV 0x0004
49 #define RKI2C_MRXADDR 0x0008
50 #define RKI2C_MRXADDR_ADDLVLD (1 << 24)
51 #define RKI2C_MRXRADDR 0x000c
52 #define RKI2C_MRXRADDR_SRADDLVLD (1 << 24)
53 #define RKI2C_MTXCNT 0x0010
54 #define RKI2C_MRXCNT 0x0014
55 #define RKI2C_IEN 0x0018
56 #define RKI2C_IEN_START (1 << 4)
57 #define RKI2C_IPD 0x001c
58 #define RKI2C_IPD_STOP (1 << 5)
59 #define RKI2C_IPD_START (1 << 4)
60 #define RKI2C_IPD_MBRF (1 << 3)
61 #define RKI2C_IPD_MBTF (1 << 2)
62 #define RKI2C_IPD_ALL 0xff
63 #define RKI2C_FCNT 0x0020
64 #define RKI2C_SCL_OE_DB 0x0024
65 #define RKI2C_TXDATA0 0x0100
66 #define RKI2C_RXDATA0 0x0200
67 #define RKI2C_ST 0x0220
68
69 #define HREAD4(sc, reg) \
70 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
71 #define HWRITE4(sc, reg, val) \
72 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
73 #define HSET4(sc, reg, bits) \
74 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
75 #define HCLR4(sc, reg, bits) \
76 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
77
78 struct rkiic_softc {
79 struct device sc_dev;
80 bus_space_tag_t sc_iot;
81 bus_space_handle_t sc_ioh;
82
83 int sc_node;
84 struct i2c_controller sc_ic;
85 struct i2c_bus sc_ib;
86 };
87
88 int rkiic_match(struct device *, void *, void *);
89 void rkiic_attach(struct device *, struct device *, void *);
90
91 const struct cfattach rkiic_ca = {
92 sizeof (struct rkiic_softc), rkiic_match, rkiic_attach
93 };
94
95 struct cfdriver rkiic_cd = {
96 NULL, "rkiic", DV_DULL
97 };
98
99 int rkiic_acquire_bus(void *, int);
100 void rkiic_release_bus(void *, int);
101 int rkiic_send_start(void *, int);
102 int rkiic_send_stop(void *, int);
103 int rkiic_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
104 void *, size_t, int);
105
106 void rkiic_bus_scan(struct device *, struct i2cbus_attach_args *, void *);
107
108 int
rkiic_match(struct device * parent,void * match,void * aux)109 rkiic_match(struct device *parent, void *match, void *aux)
110 {
111 struct fdt_attach_args *faa = aux;
112
113 return (OF_is_compatible(faa->fa_node, "rockchip,rk3288-i2c") ||
114 OF_is_compatible(faa->fa_node, "rockchip,rk3328-i2c") ||
115 OF_is_compatible(faa->fa_node, "rockchip,rk3399-i2c"));
116 }
117
118 void
rkiic_attach(struct device * parent,struct device * self,void * aux)119 rkiic_attach(struct device *parent, struct device *self, void *aux)
120 {
121 struct rkiic_softc *sc = (struct rkiic_softc *)self;
122 struct fdt_attach_args *faa = aux;
123 struct i2cbus_attach_args iba;
124 uint32_t clock_speed, bus_speed;
125 uint32_t div, divl, divh;
126 uint32_t clkdivl, clkdivh;
127
128 if (faa->fa_nreg < 1) {
129 printf(": no registers\n");
130 return;
131 }
132
133 sc->sc_iot = faa->fa_iot;
134 sc->sc_node = faa->fa_node;
135
136 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
137 faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
138 printf(": can't map registers\n");
139 return;
140 }
141
142 printf("\n");
143
144 pinctrl_byname(sc->sc_node, "default");
145
146 clock_set_assigned(sc->sc_node);
147 clock_enable(sc->sc_node, "i2c");
148 clock_enable(sc->sc_node, "pclk");
149
150 clock_speed = clock_get_frequency(sc->sc_node, "i2c");
151 bus_speed = OF_getpropint(sc->sc_node, "clock-frequency", 100000);
152
153 div = 2;
154 while (clock_speed > div * bus_speed * 8)
155 div++;
156 divl = div / 2;
157 divh = div - divl;
158 clkdivl = (divl - 1) & 0xffff;
159 clkdivh = (divh - 1) & 0xffff;
160 HWRITE4(sc, RKI2C_CLKDIV, clkdivh << 16 | clkdivl);
161
162 sc->sc_ic.ic_cookie = sc;
163 sc->sc_ic.ic_acquire_bus = rkiic_acquire_bus;
164 sc->sc_ic.ic_release_bus = rkiic_release_bus;
165 sc->sc_ic.ic_exec = rkiic_exec;
166
167 /* Configure its children */
168 memset(&iba, 0, sizeof(iba));
169 iba.iba_name = "iic";
170 iba.iba_tag = &sc->sc_ic;
171 iba.iba_bus_scan = rkiic_bus_scan;
172 iba.iba_bus_scan_arg = &sc->sc_node;
173
174 config_found(&sc->sc_dev, &iba, iicbus_print);
175
176 sc->sc_ib.ib_node = sc->sc_node;
177 sc->sc_ib.ib_ic = &sc->sc_ic;
178 i2c_register(&sc->sc_ib);
179 }
180
181 int
rkiic_acquire_bus(void * cookie,int flags)182 rkiic_acquire_bus(void *cookie, int flags)
183 {
184 struct rkiic_softc *sc = cookie;
185
186 HSET4(sc, RKI2C_CON, RKI2C_CON_I2C_EN);
187 return 0;
188 }
189
190 void
rkiic_release_bus(void * cookie,int flags)191 rkiic_release_bus(void *cookie, int flags)
192 {
193 struct rkiic_softc *sc = cookie;
194
195 HCLR4(sc, RKI2C_CON, RKI2C_CON_I2C_EN);
196 }
197
198 int
rkiic_send_start(void * cookie,int flags)199 rkiic_send_start(void *cookie, int flags)
200 {
201 struct rkiic_softc *sc = cookie;
202 int timo;
203
204 HSET4(sc, RKI2C_IPD, RKI2C_IPD_START);
205 HSET4(sc, RKI2C_CON, RKI2C_CON_START);
206 for (timo = 1000; timo > 0; timo--) {
207 if (HREAD4(sc, RKI2C_IPD) & RKI2C_IPD_START)
208 break;
209 delay(10);
210 }
211 HCLR4(sc, RKI2C_CON, RKI2C_CON_START);
212 if (timo == 0)
213 return ETIMEDOUT;
214 return 0;
215 }
216
217 int
rkiic_send_stop(void * cookie,int flags)218 rkiic_send_stop(void *cookie, int flags)
219 {
220 struct rkiic_softc *sc = cookie;
221 int timo;
222
223 HSET4(sc, RKI2C_IPD, RKI2C_IPD_STOP);
224 HSET4(sc, RKI2C_CON, RKI2C_CON_STOP);
225 for (timo = 1000; timo > 0; timo--) {
226 if (HREAD4(sc, RKI2C_IPD) & RKI2C_IPD_STOP)
227 break;
228 delay(10);
229 }
230 HCLR4(sc, RKI2C_CON, RKI2C_CON_STOP);
231 if (timo == 0)
232 return ETIMEDOUT;
233 return 0;
234 }
235
236 int
rkiic_write(struct rkiic_softc * sc,i2c_addr_t addr,const void * cmd,size_t cmdlen,void * buf,size_t buflen)237 rkiic_write(struct rkiic_softc *sc, i2c_addr_t addr, const void *cmd,
238 size_t cmdlen, void *buf, size_t buflen)
239 {
240 uint8_t txbuf[32];
241 int len = 0;
242 int timo, i;
243
244 /*
245 * Lump slave address, command and data into one single buffer
246 * and transfer it in a single operation.
247 */
248 txbuf[len++] = addr << 1;
249 for (i = 0; i < cmdlen; i++)
250 txbuf[len++] = ((uint8_t *)cmd)[i];
251 for (i = 0; i < buflen; i++)
252 txbuf[len++] = ((uint8_t *)buf)[i];
253
254 for (i = 0; i < len; i += 4) {
255 HWRITE4(sc, RKI2C_TXDATA0 + i,
256 *((uint32_t *)&txbuf[i]));
257 }
258
259 /* Start operation. */
260 HWRITE4(sc, RKI2C_MTXCNT, len);
261
262 /* Wait for completion. */
263 for (timo = 1000; timo > 0; timo--) {
264 if (HREAD4(sc, RKI2C_IPD) & RKI2C_IPD_MBTF)
265 break;
266 delay(10);
267 }
268 if (timo == 0)
269 return ETIMEDOUT;
270
271 return 0;
272 }
273
274 int
rkiic_read(struct rkiic_softc * sc,i2c_addr_t addr,const void * cmd,size_t cmdlen,void * buf,size_t buflen)275 rkiic_read(struct rkiic_softc *sc, i2c_addr_t addr, const void *cmd,
276 size_t cmdlen, void *buf, size_t buflen)
277 {
278 uint32_t mrxraddr, rxdata;
279 size_t pos = 0;
280 uint32_t con;
281 int timo, i;
282
283 HWRITE4(sc, RKI2C_MRXADDR, (addr << 1) | RKI2C_MRXADDR_ADDLVLD);
284
285 /* Send the command as "register address". */
286 mrxraddr = 0;
287 for (i = 0; i < cmdlen; i++) {
288 mrxraddr |= ((uint8_t *)cmd)[i] << (i * 8);
289 mrxraddr |= RKI2C_MRXRADDR_SRADDLVLD << i;
290 }
291 HWRITE4(sc, RKI2C_MRXRADDR, mrxraddr);
292
293 while (1) {
294 /* Indicate that we're done after this operation. */
295 if (buflen <= 32)
296 HSET4(sc, RKI2C_CON, RKI2C_CON_NAK);
297
298 /* Start operation. */
299 HWRITE4(sc, RKI2C_MRXCNT, MIN(buflen, 32));
300
301 /* Wait for completion. */
302 for (timo = 1000; timo > 0; timo--) {
303 if (HREAD4(sc, RKI2C_IPD) & RKI2C_IPD_MBRF)
304 break;
305 delay(10);
306 }
307 if (timo == 0)
308 return ETIMEDOUT;
309
310 /* Ack interrupt. */
311 HWRITE4(sc, RKI2C_IPD, RKI2C_IPD_MBRF);
312
313 for (i = 0; i < MIN(buflen, 32); i++) {
314 if (i % 4 == 0)
315 rxdata = HREAD4(sc, RKI2C_RXDATA0 + i);
316 ((uint8_t *)buf)[pos++] = rxdata;
317 rxdata >>= 8;
318 }
319
320 if (buflen <= 32)
321 return 0;
322
323 /* Switch transfer mode after the first block. */
324 if (pos <= 32) {
325 con = HREAD4(sc, RKI2C_CON);
326 con &= ~RKI2C_CON_I2C_MODE_MASK;
327 con |= RKI2C_CON_I2C_MODE_RX;
328 HWRITE4(sc, RKI2C_CON, con);
329 }
330 buflen -= 32;
331 }
332 }
333
334 int
rkiic_exec(void * cookie,i2c_op_t op,i2c_addr_t addr,const void * cmd,size_t cmdlen,void * buf,size_t buflen,int flags)335 rkiic_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
336 size_t cmdlen, void *buf, size_t buflen, int flags)
337 {
338 struct rkiic_softc *sc = cookie;
339 uint32_t con;
340 int error;
341
342 if (cmdlen > 3 || (I2C_OP_WRITE_P(op) && buflen > 28))
343 return EINVAL;
344
345 /* Clear interrupts. */
346 HWRITE4(sc, RKI2C_IPD, RKI2C_IPD_ALL);
347
348 /* Configure transfer mode. */
349 con = HREAD4(sc, RKI2C_CON);
350 con &= ~RKI2C_CON_I2C_MODE_MASK;
351 if (I2C_OP_WRITE_P(op))
352 con |= RKI2C_CON_I2C_MODE_TX;
353 else
354 con |= RKI2C_CON_I2C_MODE_RRX;
355 con &= ~RKI2C_CON_NAK;
356 con |= RKI2C_CON_ACT2NAK;
357 HWRITE4(sc, RKI2C_CON, con);
358
359 error = rkiic_send_start(sc, flags);
360 if (error)
361 return error;
362
363 if (I2C_OP_WRITE_P(op))
364 error = rkiic_write(sc, addr, cmd, cmdlen, buf, buflen);
365 else
366 error = rkiic_read(sc, addr, cmd, cmdlen, buf, buflen);
367
368 if (I2C_OP_STOP_P(op))
369 rkiic_send_stop(sc, flags);
370
371 return error;
372 }
373
374 void
rkiic_bus_scan(struct device * self,struct i2cbus_attach_args * iba,void * arg)375 rkiic_bus_scan(struct device *self, struct i2cbus_attach_args *iba, void *arg)
376 {
377 int iba_node = *(int *)arg;
378 struct i2c_attach_args ia;
379 char name[32], status[32];
380 uint32_t reg[1];
381 int node;
382
383 for (node = OF_child(iba_node); node; node = OF_peer(node)) {
384 memset(name, 0, sizeof(name));
385 memset(status, 0, sizeof(status));
386 memset(reg, 0, sizeof(reg));
387
388 if (OF_getprop(node, "compatible", name, sizeof(name)) == -1)
389 continue;
390 if (name[0] == '\0')
391 continue;
392
393 if (OF_getprop(node, "status", status, sizeof(status)) > 0 &&
394 strcmp(status, "disabled") == 0)
395 continue;
396
397 if (OF_getprop(node, "reg", ®, sizeof(reg)) != sizeof(reg))
398 continue;
399
400 memset(&ia, 0, sizeof(ia));
401 ia.ia_tag = iba->iba_tag;
402 ia.ia_addr = bemtoh32(®[0]);
403 ia.ia_name = name;
404 ia.ia_cookie = &node;
405 config_found(self, &ia, iic_print);
406 }
407 }
408