1 /* $OpenBSD: fpu_subr.c,v 1.4 2024/03/29 21:08:10 miod Exp $ */
2 /* $NetBSD: fpu_subr.c,v 1.3 1996/03/14 19:42:01 christos Exp $ */
3
4 /*
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This software was developed by the Computer Systems Engineering group
9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10 * contributed to Berkeley.
11 *
12 * All advertising materials mentioning features or use of this software
13 * must display the following acknowledgement:
14 * This product includes software developed by the University of
15 * California, Lawrence Berkeley Laboratory.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions
19 * are met:
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. Neither the name of the University nor the names of its contributors
26 * may be used to endorse or promote products derived from this software
27 * without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * SUCH DAMAGE.
40 *
41 * @(#)fpu_subr.c 8.1 (Berkeley) 6/11/93
42 */
43
44 /*
45 * FPU subroutines.
46 */
47
48 #include <sys/types.h>
49 #ifdef DIAGNOSTIC
50 #include <sys/systm.h>
51 #endif
52
53 #include <machine/fsr.h>
54 #include <machine/reg.h>
55 #include <machine/instr.h>
56
57 #include <sparc64/fpu/fpu_arith.h>
58 #include <sparc64/fpu/fpu_emu.h>
59 #include <sparc64/fpu/fpu_extern.h>
60
61 /*
62 * Shift the given number right rsh bits. Any bits that `fall off' will get
63 * shoved into the sticky field; we return the resulting sticky. Note that
64 * shifting NaNs is legal (this will never shift all bits out); a NaN's
65 * sticky field is ignored anyway.
66 */
67 int
fpu_shr(struct fpn * fp,int rsh)68 fpu_shr(struct fpn *fp, int rsh)
69 {
70 u_int m0, m1, m2, m3, s;
71 int lsh;
72
73 #ifdef DIAGNOSTIC
74 if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))
75 panic("fpu_rightshift 1");
76 #endif
77
78 m0 = fp->fp_mant[0];
79 m1 = fp->fp_mant[1];
80 m2 = fp->fp_mant[2];
81 m3 = fp->fp_mant[3];
82
83 /* If shifting all the bits out, take a shortcut. */
84 if (rsh >= FP_NMANT) {
85 #ifdef DIAGNOSTIC
86 if ((m0 | m1 | m2 | m3) == 0)
87 panic("fpu_rightshift 2");
88 #endif
89 fp->fp_mant[0] = 0;
90 fp->fp_mant[1] = 0;
91 fp->fp_mant[2] = 0;
92 fp->fp_mant[3] = 0;
93 #ifdef notdef
94 if ((m0 | m1 | m2 | m3) == 0)
95 fp->fp_class = FPC_ZERO;
96 else
97 #endif
98 fp->fp_sticky = 1;
99 return (1);
100 }
101
102 /* Squish out full words. */
103 s = fp->fp_sticky;
104 if (rsh >= 32 * 3) {
105 s |= m3 | m2 | m1;
106 m3 = m0, m2 = 0, m1 = 0, m0 = 0;
107 } else if (rsh >= 32 * 2) {
108 s |= m3 | m2;
109 m3 = m1, m2 = m0, m1 = 0, m0 = 0;
110 } else if (rsh >= 32) {
111 s |= m3;
112 m3 = m2, m2 = m1, m1 = m0, m0 = 0;
113 }
114
115 /* Handle any remaining partial word. */
116 if ((rsh &= 31) != 0) {
117 lsh = 32 - rsh;
118 s |= m3 << lsh;
119 m3 = (m3 >> rsh) | (m2 << lsh);
120 m2 = (m2 >> rsh) | (m1 << lsh);
121 m1 = (m1 >> rsh) | (m0 << lsh);
122 m0 >>= rsh;
123 }
124 fp->fp_mant[0] = m0;
125 fp->fp_mant[1] = m1;
126 fp->fp_mant[2] = m2;
127 fp->fp_mant[3] = m3;
128 fp->fp_sticky = s;
129 return (s);
130 }
131
132 /*
133 * Force a number to be normal, i.e., make its fraction have all zero
134 * bits before FP_1, then FP_1, then all 1 bits. This is used for denorms
135 * and (sometimes) for intermediate results.
136 *
137 * Internally, this may use a `supernormal' -- a number whose fp_mant
138 * is greater than or equal to 2.0 -- so as a side effect you can hand it
139 * a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
140 */
141 void
fpu_norm(struct fpn * fp)142 fpu_norm(struct fpn *fp)
143 {
144 u_int m0, m1, m2, m3, top, sup, nrm;
145 int lsh, rsh, exp;
146
147 exp = fp->fp_exp;
148 m0 = fp->fp_mant[0];
149 m1 = fp->fp_mant[1];
150 m2 = fp->fp_mant[2];
151 m3 = fp->fp_mant[3];
152
153 /* Handle severe subnormals with 32-bit moves. */
154 if (m0 == 0) {
155 if (m1)
156 m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;
157 else if (m2)
158 m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;
159 else if (m3)
160 m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;
161 else {
162 fp->fp_class = FPC_ZERO;
163 return;
164 }
165 }
166
167 /* Now fix any supernormal or remaining subnormal. */
168 nrm = FP_1;
169 sup = nrm << 1;
170 if (m0 >= sup) {
171 /*
172 * We have a supernormal number. We need to shift it right.
173 * We may assume m3==0.
174 */
175 for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */
176 top >>= 1;
177 exp += rsh;
178 lsh = 32 - rsh;
179 m3 = m2 << lsh;
180 m2 = (m2 >> rsh) | (m1 << lsh);
181 m1 = (m1 >> rsh) | (m0 << lsh);
182 m0 = top;
183 } else if (m0 < nrm) {
184 /*
185 * We have a regular denorm (a subnormal number), and need
186 * to shift it left.
187 */
188 for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */
189 top <<= 1;
190 exp -= lsh;
191 rsh = 32 - lsh;
192 m0 = top | (m1 >> rsh);
193 m1 = (m1 << lsh) | (m2 >> rsh);
194 m2 = (m2 << lsh) | (m3 >> rsh);
195 m3 <<= lsh;
196 }
197
198 fp->fp_exp = exp;
199 fp->fp_mant[0] = m0;
200 fp->fp_mant[1] = m1;
201 fp->fp_mant[2] = m2;
202 fp->fp_mant[3] = m3;
203 }
204
205 /*
206 * Concoct a `fresh' Quiet NaN per Appendix N.
207 * As a side effect, we set NV (invalid) for the current exceptions.
208 */
209 struct fpn *
fpu_newnan(struct fpemu * fe)210 fpu_newnan(struct fpemu *fe)
211 {
212 struct fpn *fp;
213
214 fe->fe_cx = FSR_NV;
215 fp = &fe->fe_f3;
216 fp->fp_class = FPC_QNAN;
217 fp->fp_sign = 0;
218 fp->fp_mant[0] = FP_1 - 1;
219 fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0;
220 return (fp);
221 }
222