xref: /openbsd-src/sys/arch/amd64/include/pci_machdep.h (revision eb3d9e2dd0357d3826bf04a6468e649c8525d43e)
1 /*	$OpenBSD: pci_machdep.h,v 1.32 2025/01/23 11:24:34 kettenis Exp $	*/
2 /*	$NetBSD: pci_machdep.h,v 1.1 2003/02/26 21:26:11 fvdl Exp $	*/
3 
4 /*
5  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
6  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Charles M. Hannum.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * Machine-specific definitions for PCI autoconfiguration.
36  */
37 
38 /*
39  * amd64-specific PCI structure and type definitions.
40  * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
41  */
42 
43 extern struct bus_dma_tag pci_bus_dma_tag;
44 
45 /*
46  * Types provided to machine-independent PCI code
47  */
48 typedef void *pci_chipset_tag_t;
49 typedef u_int32_t pcitag_t;
50 
51 typedef struct {
52 	pcitag_t tag;
53 	int line, pin;
54 } pci_intr_handle_t;
55 
56 #define	pci_intr_line(pc,ih)	((ih.line) & 0xff)
57 
58 /*
59  * amd64-specific PCI variables and functions.
60  * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
61  */
62 struct		pci_attach_args;
63 
64 extern struct extent *pciio_ex;
65 extern struct extent *pcimem_ex;
66 extern struct extent *pcibus_ex;
67 void		pci_init_extents(void);
68 
69 /*
70  * Functions provided to machine-independent PCI code.
71  */
72 void		pci_attach_hook(struct device *, struct device *,
73 		    struct pcibus_attach_args *);
74 int		pci_bus_maxdevs(pci_chipset_tag_t, int);
75 pcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
76 void		pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
77 		    int *, int *, int *);
78 int		pci_conf_size(pci_chipset_tag_t, pcitag_t);
79 pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
80 void		pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
81 		    pcireg_t);
82 int		pci_intr_enable_msivec(struct pci_attach_args *, int);
83 int		pci_intr_map_msi(struct pci_attach_args *,
84 		    pci_intr_handle_t *);
85 int		pci_intr_map_msivec(struct pci_attach_args *,
86 		    int, pci_intr_handle_t *);
87 int		pci_intr_map_msix(struct pci_attach_args *,
88 		    int, pci_intr_handle_t *);
89 int		pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
90 const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
91 void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
92 		    int, int (*)(void *), void *, const char *);
93 void		*pci_intr_establish_cpu(pci_chipset_tag_t, pci_intr_handle_t,
94 		    int, struct cpu_info *,
95 		    int (*)(void *), void *, const char *);
96 void		pci_intr_disestablish(pci_chipset_tag_t, void *);
97 int		pci_probe_device_hook(pci_chipset_tag_t,
98 		    struct pci_attach_args *);
99 
100 void 		pci_dev_postattach(struct device *, struct pci_attach_args *);
101 
102 pcireg_t	pci_min_powerstate(pci_chipset_tag_t, pcitag_t);
103 void		pci_set_powerstate_md(pci_chipset_tag_t, pcitag_t, int, int);
104 
105 void		pci_mcfg_init(bus_space_tag_t, bus_addr_t, int, int, int);
106 pci_chipset_tag_t pci_lookup_segment(int, int);
107 
108 #define __HAVE_PCI_MSIX
109 
110 int	pci_msix_table_map(pci_chipset_tag_t, pcitag_t,
111 	    bus_space_tag_t, bus_space_handle_t *);
112 void	pci_msix_table_unmap(pci_chipset_tag_t, pcitag_t,
113 	    bus_space_tag_t, bus_space_handle_t);
114 
115 /*
116  * ALL OF THE FOLLOWING ARE MACHINE-DEPENDENT, AND SHOULD NOT BE USED
117  * BY PORTABLE CODE.
118  */
119 
120 /*
121  * Section 6.2.4, `Miscellaneous Functions' of the PCI Specification,
122  * says that 255 means `unknown' or `no connection' to the interrupt
123  * controller on a PC.
124  */
125 #define	X86_PCI_INTERRUPT_LINE_NO_CONNECTION	0xff
126 
127 /*
128  * PCI address space is shared with ISA, so avoid legacy ISA I/O
129  * registers.
130  */
131 #define PCI_IO_START	0x400
132 #define PCI_IO_END	0xffff
133 
134 /*
135  * Avoid the DOS Compatibility Memory area.
136  */
137 #define PCI_MEM_START	0x100000
138