xref: /openbsd-src/lib/libc/arch/sparc64/fpu/fpu_compare.c (revision 6244ddcc7bcc151947d91dad33fcee9e7428fcc3)
1 /*	$OpenBSD: fpu_compare.c,v 1.4 2024/03/29 21:02:11 miod Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_compare.c	8.1 (Berkeley) 6/11/93
45  *	$NetBSD: fpu_compare.c,v 1.3 2001/08/26 05:46:31 eeh Exp $
46  */
47 
48 /*
49  * CMP and CMPE instructions.
50  *
51  * These rely on the fact that our internal wide format is achieved by
52  * adding zero bits to the end of narrower mantissas.
53  */
54 
55 #include <sys/types.h>
56 
57 #include <machine/fsr.h>
58 
59 #include "fpu_arith.h"
60 #include "fpu_emu.h"
61 #include "fpu_extern.h"
62 
63 static u_long fcc_nmask[] = {
64 	~FSR_FCC,
65 	~FSR_FCC1,
66 	~FSR_FCC2,
67 	~FSR_FCC3
68 };
69 
70 /* XXX: we don't use the FSR_FCCx macros here; it's much easier this way. */
71 static int fcc_shift[] = {
72 	FSR_FCC_SHIFT,
73 	FSR_FCC1_SHIFT,
74 	FSR_FCC2_SHIFT,
75 	FSR_FCC3_SHIFT
76 };
77 
78 /*
79  * Perform a compare instruction (with or without unordered exception).
80  * This updates the fcc field in the fsr.
81  *
82  * If either operand is NaN, the result is unordered.  For cmpe, this
83  * causes an NV exception.  Everything else is ordered:
84  *	|Inf| > |numbers| > |0|.
85  * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
86  * so we get this directly.  Note, however, that two zeros compare equal
87  * regardless of sign, while everything else depends on sign.
88  *
89  * Incidentally, two Infs of the same sign compare equal (per the 80387
90  * manual---it would be nice if the SPARC documentation were more
91  * complete).
92  */
93 void
__fpu_compare(struct fpemu * fe,int cmpe,int fcc)94 __fpu_compare(struct fpemu *fe, int cmpe, int fcc)
95 {
96 	struct fpn *a, *b;
97 	int cc;
98 	FPU_DECL_CARRY
99 
100 	a = &fe->fe_f1;
101 	b = &fe->fe_f2;
102 
103 	if (ISNAN(a) || ISNAN(b)) {
104 		/*
105 		 * In any case, we already got an exception for signalling
106 		 * NaNs; here we may replace that one with an identical
107 		 * exception, but so what?.
108 		 */
109 		if (cmpe)
110 			fe->fe_cx = FSR_NV;
111 		cc = FSR_CC_UO;
112 		goto done;
113 	}
114 
115 	/*
116 	 * Must handle both-zero early to avoid sign goofs.  Otherwise,
117 	 * at most one is 0, and if the signs differ we are done.
118 	 */
119 	if (ISZERO(a) && ISZERO(b)) {
120 		cc = FSR_CC_EQ;
121 		goto done;
122 	}
123 	if (a->fp_sign) {		/* a < 0 (or -0) */
124 		if (!b->fp_sign) {	/* b >= 0 (or if a = -0, b > 0) */
125 			cc = FSR_CC_LT;
126 			goto done;
127 		}
128 	} else {			/* a > 0 (or +0) */
129 		if (b->fp_sign) {	/* b <= -0 (or if a = +0, b < 0) */
130 			cc = FSR_CC_GT;
131 			goto done;
132 		}
133 	}
134 
135 	/*
136 	 * Now the signs are the same (but may both be negative).  All
137 	 * we have left are these cases:
138 	 *
139 	 *	|a| < |b|		[classes or values differ]
140 	 *	|a| > |b|		[classes or values differ]
141 	 *	|a| == |b|		[classes and values identical]
142 	 *
143 	 * We define `diff' here to expand these as:
144 	 *
145 	 *	|a| < |b|, a,b >= 0: a < b => FSR_CC_LT
146 	 *	|a| < |b|, a,b < 0:  a > b => FSR_CC_GT
147 	 *	|a| > |b|, a,b >= 0: a > b => FSR_CC_GT
148 	 *	|a| > |b|, a,b < 0:  a < b => FSR_CC_LT
149 	 */
150 #define opposite_cc(cc) ((cc) == FSR_CC_LT ? FSR_CC_GT : FSR_CC_LT)
151 #define	diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) :  (magnitude))
152 	if (a->fp_class < b->fp_class) {	/* |a| < |b| */
153 		cc = diff(FSR_CC_LT);
154 		goto done;
155 	}
156 	if (a->fp_class > b->fp_class) {	/* |a| > |b| */
157 		cc = diff(FSR_CC_GT);
158 		goto done;
159 	}
160 	/* now none can be 0: only Inf and numbers remain */
161 	if (ISINF(a)) {				/* |Inf| = |Inf| */
162 		cc = FSR_CC_EQ;
163 		goto done;
164 	}
165 	/*
166 	 * Only numbers remain.  To compare two numbers in magnitude, we
167 	 * simply subtract them.
168 	 */
169 	a = __fpu_sub(fe);
170 	if (a->fp_class == FPC_ZERO)
171 		cc = FSR_CC_EQ;
172 	else
173 		cc = diff(FSR_CC_GT);
174 
175 done:
176 	fe->fe_fsr = (fe->fe_fsr & fcc_nmask[fcc]) |
177 	    ((u_long)cc << fcc_shift[fcc]);
178 }
179