1 /* $NetBSD: cs42l42.h,v 1.1.1.2 2020/01/03 14:33:03 skrll Exp $ */ 2 3 /* SPDX-License-Identifier: GPL-2.0-only */ 4 /* 5 * cs42l42.h -- CS42L42 ALSA SoC audio driver DT bindings header 6 * 7 * Copyright 2016 Cirrus Logic, Inc. 8 * 9 * Author: James Schulman <james.schulman@cirrus.com> 10 * Author: Brian Austin <brian.austin@cirrus.com> 11 * Author: Michael White <michael.white@cirrus.com> 12 */ 13 14 #ifndef __DT_CS42L42_H 15 #define __DT_CS42L42_H 16 17 /* HPOUT Load Capacity */ 18 #define CS42L42_HPOUT_LOAD_1NF 0 19 #define CS42L42_HPOUT_LOAD_10NF 1 20 21 /* HPOUT Clamp to GND Override */ 22 #define CS42L42_HPOUT_CLAMP_EN 0 23 #define CS42L42_HPOUT_CLAMP_DIS 1 24 25 /* Tip Sense Inversion */ 26 #define CS42L42_TS_INV_DIS 0 27 #define CS42L42_TS_INV_EN 1 28 29 /* Tip Sense Debounce */ 30 #define CS42L42_TS_DBNCE_0 0 31 #define CS42L42_TS_DBNCE_125 1 32 #define CS42L42_TS_DBNCE_250 2 33 #define CS42L42_TS_DBNCE_500 3 34 #define CS42L42_TS_DBNCE_750 4 35 #define CS42L42_TS_DBNCE_1000 5 36 #define CS42L42_TS_DBNCE_1250 6 37 #define CS42L42_TS_DBNCE_1500 7 38 39 /* Button Press Software Debounce Times */ 40 #define CS42L42_BTN_DET_INIT_DBNCE_MIN 0 41 #define CS42L42_BTN_DET_INIT_DBNCE_DEFAULT 100 42 #define CS42L42_BTN_DET_INIT_DBNCE_MAX 200 43 44 #define CS42L42_BTN_DET_EVENT_DBNCE_MIN 0 45 #define CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT 10 46 #define CS42L42_BTN_DET_EVENT_DBNCE_MAX 20 47 48 /* Button Detect Level Sensitivities */ 49 #define CS42L42_NUM_BIASES 4 50 51 #define CS42L42_HS_DET_LEVEL_15 0x0F 52 #define CS42L42_HS_DET_LEVEL_8 0x08 53 #define CS42L42_HS_DET_LEVEL_4 0x04 54 #define CS42L42_HS_DET_LEVEL_1 0x01 55 56 #define CS42L42_HS_DET_LEVEL_MIN 0 57 #define CS42L42_HS_DET_LEVEL_MAX 0x3F 58 59 /* HS Bias Ramp Rate */ 60 61 #define CS42L42_HSBIAS_RAMP_FAST_RISE_SLOW_FALL 0 62 #define CS42L42_HSBIAS_RAMP_FAST 1 63 #define CS42L42_HSBIAS_RAMP_SLOW 2 64 #define CS42L42_HSBIAS_RAMP_SLOWEST 3 65 66 #define CS42L42_HSBIAS_RAMP_TIME0 10 67 #define CS42L42_HSBIAS_RAMP_TIME1 40 68 #define CS42L42_HSBIAS_RAMP_TIME2 90 69 #define CS42L42_HSBIAS_RAMP_TIME3 170 70 71 #endif /* __DT_CS42L42_H */ 72