1 //===-- xray_mips64.cc ------------------------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file is a part of XRay, a dynamic runtime instrumentation system.
11 //
12 // Implementation of MIPS64-specific routines.
13 //
14 //===----------------------------------------------------------------------===//
15 #include "sanitizer_common/sanitizer_common.h"
16 #include "xray_defs.h"
17 #include "xray_interface_internal.h"
18 #include <atomic>
19
20 namespace __xray {
21
22 // The machine codes for some instructions used in runtime patching.
23 enum PatchOpcodes : uint32_t {
24 PO_DADDIU = 0x64000000, // daddiu rt, rs, imm
25 PO_SD = 0xFC000000, // sd rt, base(offset)
26 PO_LUI = 0x3C000000, // lui rt, imm
27 PO_ORI = 0x34000000, // ori rt, rs, imm
28 PO_DSLL = 0x00000038, // dsll rd, rt, sa
29 PO_JALR = 0x00000009, // jalr rs
30 PO_LD = 0xDC000000, // ld rt, base(offset)
31 PO_B60 = 0x1000000f, // b #60
32 PO_NOP = 0x0, // nop
33 };
34
35 enum RegNum : uint32_t {
36 RN_T0 = 0xC,
37 RN_T9 = 0x19,
38 RN_RA = 0x1F,
39 RN_SP = 0x1D,
40 };
41
encodeInstruction(uint32_t Opcode,uint32_t Rs,uint32_t Rt,uint32_t Imm)42 inline static uint32_t encodeInstruction(uint32_t Opcode, uint32_t Rs,
43 uint32_t Rt,
44 uint32_t Imm) XRAY_NEVER_INSTRUMENT {
45 return (Opcode | Rs << 21 | Rt << 16 | Imm);
46 }
47
48 inline static uint32_t
encodeSpecialInstruction(uint32_t Opcode,uint32_t Rs,uint32_t Rt,uint32_t Rd,uint32_t Imm)49 encodeSpecialInstruction(uint32_t Opcode, uint32_t Rs, uint32_t Rt, uint32_t Rd,
50 uint32_t Imm) XRAY_NEVER_INSTRUMENT {
51 return (Rs << 21 | Rt << 16 | Rd << 11 | Imm << 6 | Opcode);
52 }
53
patchSled(const bool Enable,const uint32_t FuncId,const XRaySledEntry & Sled,void (* TracingHook)())54 inline static bool patchSled(const bool Enable, const uint32_t FuncId,
55 const XRaySledEntry &Sled,
56 void (*TracingHook)()) XRAY_NEVER_INSTRUMENT {
57 // When |Enable| == true,
58 // We replace the following compile-time stub (sled):
59 //
60 // xray_sled_n:
61 // B .tmpN
62 // 15 NOPs (60 bytes)
63 // .tmpN
64 //
65 // With the following runtime patch:
66 //
67 // xray_sled_n (64-bit):
68 // daddiu sp, sp, -16 ;create stack frame
69 // nop
70 // sd ra, 8(sp) ;save return address
71 // sd t9, 0(sp) ;save register t9
72 // lui t9, %highest(__xray_FunctionEntry/Exit)
73 // ori t9, t9, %higher(__xray_FunctionEntry/Exit)
74 // dsll t9, t9, 16
75 // ori t9, t9, %hi(__xray_FunctionEntry/Exit)
76 // dsll t9, t9, 16
77 // ori t9, t9, %lo(__xray_FunctionEntry/Exit)
78 // lui t0, %hi(function_id)
79 // jalr t9 ;call Tracing hook
80 // ori t0, t0, %lo(function_id) ;pass function id (delay slot)
81 // ld t9, 0(sp) ;restore register t9
82 // ld ra, 8(sp) ;restore return address
83 // daddiu sp, sp, 16 ;delete stack frame
84 //
85 // Replacement of the first 4-byte instruction should be the last and atomic
86 // operation, so that the user code which reaches the sled concurrently
87 // either jumps over the whole sled, or executes the whole sled when the
88 // latter is ready.
89 //
90 // When |Enable|==false, we set back the first instruction in the sled to be
91 // B #60
92
93 if (Enable) {
94 uint32_t LoTracingHookAddr =
95 reinterpret_cast<int64_t>(TracingHook) & 0xffff;
96 uint32_t HiTracingHookAddr =
97 (reinterpret_cast<int64_t>(TracingHook) >> 16) & 0xffff;
98 uint32_t HigherTracingHookAddr =
99 (reinterpret_cast<int64_t>(TracingHook) >> 32) & 0xffff;
100 uint32_t HighestTracingHookAddr =
101 (reinterpret_cast<int64_t>(TracingHook) >> 48) & 0xffff;
102 uint32_t LoFunctionID = FuncId & 0xffff;
103 uint32_t HiFunctionID = (FuncId >> 16) & 0xffff;
104 *reinterpret_cast<uint32_t *>(Sled.Address + 8) = encodeInstruction(
105 PatchOpcodes::PO_SD, RegNum::RN_SP, RegNum::RN_RA, 0x8);
106 *reinterpret_cast<uint32_t *>(Sled.Address + 12) = encodeInstruction(
107 PatchOpcodes::PO_SD, RegNum::RN_SP, RegNum::RN_T9, 0x0);
108 *reinterpret_cast<uint32_t *>(Sled.Address + 16) = encodeInstruction(
109 PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T9, HighestTracingHookAddr);
110 *reinterpret_cast<uint32_t *>(Sled.Address + 20) =
111 encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T9, RegNum::RN_T9,
112 HigherTracingHookAddr);
113 *reinterpret_cast<uint32_t *>(Sled.Address + 24) = encodeSpecialInstruction(
114 PatchOpcodes::PO_DSLL, 0x0, RegNum::RN_T9, RegNum::RN_T9, 0x10);
115 *reinterpret_cast<uint32_t *>(Sled.Address + 28) = encodeInstruction(
116 PatchOpcodes::PO_ORI, RegNum::RN_T9, RegNum::RN_T9, HiTracingHookAddr);
117 *reinterpret_cast<uint32_t *>(Sled.Address + 32) = encodeSpecialInstruction(
118 PatchOpcodes::PO_DSLL, 0x0, RegNum::RN_T9, RegNum::RN_T9, 0x10);
119 *reinterpret_cast<uint32_t *>(Sled.Address + 36) = encodeInstruction(
120 PatchOpcodes::PO_ORI, RegNum::RN_T9, RegNum::RN_T9, LoTracingHookAddr);
121 *reinterpret_cast<uint32_t *>(Sled.Address + 40) = encodeInstruction(
122 PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T0, HiFunctionID);
123 *reinterpret_cast<uint32_t *>(Sled.Address + 44) = encodeSpecialInstruction(
124 PatchOpcodes::PO_JALR, RegNum::RN_T9, 0x0, RegNum::RN_RA, 0X0);
125 *reinterpret_cast<uint32_t *>(Sled.Address + 48) = encodeInstruction(
126 PatchOpcodes::PO_ORI, RegNum::RN_T0, RegNum::RN_T0, LoFunctionID);
127 *reinterpret_cast<uint32_t *>(Sled.Address + 52) = encodeInstruction(
128 PatchOpcodes::PO_LD, RegNum::RN_SP, RegNum::RN_T9, 0x0);
129 *reinterpret_cast<uint32_t *>(Sled.Address + 56) = encodeInstruction(
130 PatchOpcodes::PO_LD, RegNum::RN_SP, RegNum::RN_RA, 0x8);
131 *reinterpret_cast<uint32_t *>(Sled.Address + 60) = encodeInstruction(
132 PatchOpcodes::PO_DADDIU, RegNum::RN_SP, RegNum::RN_SP, 0x10);
133 uint32_t CreateStackSpace = encodeInstruction(
134 PatchOpcodes::PO_DADDIU, RegNum::RN_SP, RegNum::RN_SP, 0xfff0);
135 std::atomic_store_explicit(
136 reinterpret_cast<std::atomic<uint32_t> *>(Sled.Address),
137 CreateStackSpace, std::memory_order_release);
138 } else {
139 std::atomic_store_explicit(
140 reinterpret_cast<std::atomic<uint32_t> *>(Sled.Address),
141 uint32_t(PatchOpcodes::PO_B60), std::memory_order_release);
142 }
143 return true;
144 }
145
patchFunctionEntry(const bool Enable,const uint32_t FuncId,const XRaySledEntry & Sled,void (* Trampoline)())146 bool patchFunctionEntry(const bool Enable, const uint32_t FuncId,
147 const XRaySledEntry &Sled,
148 void (*Trampoline)()) XRAY_NEVER_INSTRUMENT {
149 return patchSled(Enable, FuncId, Sled, Trampoline);
150 }
151
patchFunctionExit(const bool Enable,const uint32_t FuncId,const XRaySledEntry & Sled)152 bool patchFunctionExit(const bool Enable, const uint32_t FuncId,
153 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
154 return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
155 }
156
patchFunctionTailExit(const bool Enable,const uint32_t FuncId,const XRaySledEntry & Sled)157 bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
158 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
159 // FIXME: In the future we'd need to distinguish between non-tail exits and
160 // tail exits for better information preservation.
161 return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
162 }
163
patchCustomEvent(const bool Enable,const uint32_t FuncId,const XRaySledEntry & Sled)164 bool patchCustomEvent(const bool Enable, const uint32_t FuncId,
165 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
166 // FIXME: Implement in mips64?
167 return false;
168 }
169
patchTypedEvent(const bool Enable,const uint32_t FuncId,const XRaySledEntry & Sled)170 bool patchTypedEvent(const bool Enable, const uint32_t FuncId,
171 const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
172 // FIXME: Implement in mips64?
173 return false;
174 }
175 } // namespace __xray
176
__xray_ArgLoggerEntry()177 extern "C" void __xray_ArgLoggerEntry() XRAY_NEVER_INSTRUMENT {
178 // FIXME: this will have to be implemented in the trampoline assembly file
179 }
180