xref: /netbsd-src/sys/dev/sbus/isp_sbus.c (revision 948320a0e09d4872f36fae3d0795e92246052c9b)
1 /* $NetBSD: isp_sbus.c,v 1.81 2012/09/07 22:37:27 macallan Exp $ */
2 /*
3  * SBus specific probe and attach routines for Qlogic ISP SCSI adapters.
4  *
5  * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
6  * All rights reserved.
7  *
8  * Additional Copyright (C) 2000-2007 by Matthew Jacob
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: isp_sbus.c,v 1.81 2012/09/07 22:37:27 macallan Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 #include <sys/kernel.h>
42 #include <sys/malloc.h>
43 #include <sys/queue.h>
44 #include <dev/ic/isp_netbsd.h>
45 #include <sys/intr.h>
46 #include <machine/autoconf.h>
47 #include <dev/sbus/sbusvar.h>
48 #include <sys/reboot.h>
49 #include "opt_isp.h"
50 
51 static void isp_sbus_reset0(ispsoftc_t *);
52 static void isp_sbus_reset1(ispsoftc_t *);
53 static int isp_sbus_intr(void *);
54 static int
55 isp_sbus_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
56 static uint32_t isp_sbus_rd_reg(ispsoftc_t *, int);
57 static void isp_sbus_wr_reg (ispsoftc_t *, int, uint32_t);
58 static int isp_sbus_mbxdma(ispsoftc_t *);
59 static int isp_sbus_dmasetup(ispsoftc_t *, XS_T *, void *);
60 static void isp_sbus_dmateardown(ispsoftc_t *, XS_T *, uint32_t);
61 
62 #ifndef	ISP_DISABLE_FW
63 #include <dev/microcode/isp/asm_sbus.h>
64 #else
65 #define	ISP_1000_RISC_CODE	NULL
66 #endif
67 
68 static const struct ispmdvec mdvec = {
69 	isp_sbus_rd_isr,
70 	isp_sbus_rd_reg,
71 	isp_sbus_wr_reg,
72 	isp_sbus_mbxdma,
73 	isp_sbus_dmasetup,
74 	isp_sbus_dmateardown,
75 	isp_sbus_reset0,
76 	isp_sbus_reset1,
77 	NULL,
78 	ISP_1000_RISC_CODE,
79 	0,
80 	0
81 };
82 
83 struct isp_sbussoftc {
84 	ispsoftc_t	sbus_isp;
85 	sdparam		sbus_dev;
86 	struct scsipi_channel sbus_chan;
87 	bus_space_tag_t	sbus_bustag;
88 	bus_space_handle_t sbus_reg;
89 	int		sbus_node;
90 	int		sbus_pri;
91 	struct ispmdvec	sbus_mdvec;
92 	bus_dmamap_t	*sbus_dmamap;
93 	int16_t		sbus_poff[_NREG_BLKS];
94 };
95 
96 
97 static int isp_match(device_t, cfdata_t, void *);
98 static void isp_sbus_attach(device_t, device_t, void *);
99 CFATTACH_DECL_NEW(isp_sbus, sizeof (struct isp_sbussoftc),
100     isp_match, isp_sbus_attach, NULL, NULL);
101 
102 static int
isp_match(device_t parent,cfdata_t cf,void * aux)103 isp_match(device_t parent, cfdata_t cf, void *aux)
104 {
105 	int rv;
106 	struct sbus_attach_args *sa = aux;
107 
108 	rv = (strcmp(cf->cf_name, sa->sa_name) == 0 ||
109 		strcmp("PTI,ptisp", sa->sa_name) == 0 ||
110 		strcmp("ptisp", sa->sa_name) == 0 ||
111 		strcmp("SUNW,isp", sa->sa_name) == 0 ||
112 		strcmp("QLGC,isp", sa->sa_name) == 0);
113 
114 	return (rv);
115 }
116 
117 
118 static void
isp_sbus_attach(device_t parent,device_t self,void * aux)119 isp_sbus_attach(device_t parent, device_t self, void *aux)
120 {
121 	int freq, ispburst, sbusburst;
122 	struct sbus_attach_args *sa = aux;
123 	struct isp_sbussoftc *sbc = device_private(self);
124 	struct sbus_softc *sbsc = device_private(parent);
125 	ispsoftc_t *isp = &sbc->sbus_isp;
126 
127 	isp->isp_osinfo.dev = self;
128 
129 	printf(" for %s\n", sa->sa_name);
130 
131 	isp->isp_nchan = isp->isp_osinfo.adapter.adapt_nchannels = 1;
132 
133 	sbc->sbus_bustag = sa->sa_bustag;
134 	if (sa->sa_nintr != 0)
135 		sbc->sbus_pri = sa->sa_pri;
136 	sbc->sbus_mdvec = mdvec;
137 
138 	if (sa->sa_npromvaddrs) {
139 		sbus_promaddr_to_handle(sa->sa_bustag,
140 			sa->sa_promvaddrs[0], &sbc->sbus_reg);
141 	} else {
142 		if (sbus_bus_map(sa->sa_bustag,	sa->sa_slot, sa->sa_offset,
143 			sa->sa_size, 0, &sbc->sbus_reg) != 0) {
144 			aprint_error_dev(self, "cannot map registers\n");
145 			return;
146 		}
147 	}
148 	sbc->sbus_node = sa->sa_node;
149 
150 	freq = prom_getpropint(sa->sa_node, "clock-frequency", 0);
151 	if (freq) {
152 		/*
153 		 * Convert from HZ to MHz, rounding up.
154 		 */
155 		freq = (freq + 500000)/1000000;
156 	}
157 	sbc->sbus_mdvec.dv_clock = freq;
158 
159 	/*
160 	 * Now figure out what the proper burst sizes, etc., to use.
161 	 * Unfortunately, there is no ddi_dma_burstsizes here which
162 	 * walks up the tree finding the limiting burst size node (if
163 	 * any).
164 	 */
165 	sbusburst = sbsc->sc_burst;
166 	if (sbusburst == 0)
167 		sbusburst = SBUS_BURST_32 - 1;
168 	ispburst = prom_getpropint(sa->sa_node, "burst-sizes", -1);
169 	if (ispburst == -1) {
170 		ispburst = sbusburst;
171 	}
172 	ispburst &= sbusburst;
173 	ispburst &= ~(1 << 7);
174 	ispburst &= ~(1 << 6);
175 	sbc->sbus_mdvec.dv_conf1 =  0;
176 	if (ispburst & (1 << 5)) {
177 		sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32;
178 	} else if (ispburst & (1 << 4)) {
179 		sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16;
180 	} else if (ispburst & (1 << 3)) {
181 		sbc->sbus_mdvec.dv_conf1 =
182 		    BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8;
183 	}
184 	if (sbc->sbus_mdvec.dv_conf1) {
185 		sbc->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE;
186 	}
187 
188 	isp->isp_mdvec = &sbc->sbus_mdvec;
189 	isp->isp_bustype = ISP_BT_SBUS;
190 	isp->isp_type = ISP_HA_SCSI_UNKNOWN;
191 	isp->isp_param = &sbc->sbus_dev;
192 	isp->isp_dmatag = sa->sa_dmatag;
193 	ISP_MEMZERO(isp->isp_param, sizeof (sdparam));
194 	isp->isp_osinfo.chan = &sbc->sbus_chan;
195 
196 	sbc->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
197 	sbc->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF;
198 	sbc->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF;
199 	sbc->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF;
200 	sbc->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
201 
202 	/* Establish interrupt channel */
203 	bus_intr_establish(sbc->sbus_bustag, sbc->sbus_pri, IPL_BIO,
204 	    isp_sbus_intr, sbc);
205 
206 	/*
207 	 * Set up logging levels.
208 	 */
209 #ifdef	ISP_LOGDEFAULT
210 	isp->isp_dblev = ISP_LOGDEFAULT;
211 #else
212 	isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
213 	if (bootverbose)
214 		isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
215 #ifdef	SCSIDEBUG
216 	isp->isp_dblev |= ISP_LOGDEBUG1|ISP_LOGDEBUG2;
217 #endif
218 #ifdef	DEBUG
219 	isp->isp_dblev |= ISP_LOGDEBUG0;
220 #endif
221 #endif
222 
223 	isp->isp_confopts = device_cfdata(self)->cf_flags;
224 	SDPARAM(isp, 0)->role = ISP_DEFAULT_ROLES;
225 
226 	/*
227 	 * There's no tool on sparc to set NVRAM for ISPs, so ignore it.
228 	 */
229 	isp->isp_confopts |= ISP_CFG_NONVRAM;
230 
231 	/*
232 	 * Mark things if we're a PTI SBus adapter.
233 	 */
234 	if (strcmp("PTI,ptisp", sa->sa_name) == 0 ||
235 	    strcmp("ptisp", sa->sa_name) == 0) {
236 		SDPARAM(isp, 0)->isp_ptisp = 1;
237 	}
238 	ISP_LOCK(isp);
239 	isp_reset(isp, 1);
240 	if (isp->isp_state != ISP_RESETSTATE) {
241 		ISP_UNLOCK(isp);
242 		return;
243 	}
244 	ISP_ENABLE_INTS(isp);
245 	isp_init(isp);
246 	if (isp->isp_state != ISP_INITSTATE) {
247 		isp_uninit(isp);
248 		ISP_UNLOCK(isp);
249 		return;
250 	}
251 
252 	/*
253 	 * do generic attach.
254 	 */
255 	ISP_UNLOCK(isp);
256 	isp_attach(isp);
257 }
258 
259 
260 static void
isp_sbus_reset0(ispsoftc_t * isp)261 isp_sbus_reset0(ispsoftc_t *isp)
262 {
263 	ISP_DISABLE_INTS(isp);
264 }
265 
266 static void
isp_sbus_reset1(ispsoftc_t * isp)267 isp_sbus_reset1(ispsoftc_t *isp)
268 {
269 	ISP_ENABLE_INTS(isp);
270 }
271 
272 static int
isp_sbus_intr(void * arg)273 isp_sbus_intr(void *arg)
274 {
275 	uint32_t isr;
276 	uint16_t sema, mbox;
277 	ispsoftc_t *isp = arg;
278 
279 	if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
280 		isp->isp_intbogus++;
281 		return (0);
282 	} else {
283 		struct isp_sbussoftc *sbc = arg;
284 		sbc->sbus_isp.isp_osinfo.onintstack = 1;
285 		isp_intr(isp, isr, sema, mbox);
286 		sbc->sbus_isp.isp_osinfo.onintstack = 0;
287 		return (1);
288 	}
289 }
290 
291 #define	IspVirt2Off(a, x)	\
292 	(((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \
293 	_BLK_REG_SHFT] + ((x) & 0xff))
294 
295 #define	BXR2(sbc, off)		\
296 	bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, off)
297 
298 static int
isp_sbus_rd_isr(ispsoftc_t * isp,uint32_t * isrp,uint16_t * semap,uint16_t * mbp)299 isp_sbus_rd_isr(ispsoftc_t *isp, uint32_t *isrp,
300     uint16_t *semap, uint16_t *mbp)
301 {
302 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
303 	uint32_t isr;
304 	uint16_t sema;
305 
306 	isr = BXR2(sbc, IspVirt2Off(isp, BIU_ISR));
307 	sema = BXR2(sbc, IspVirt2Off(isp, BIU_SEMA));
308 	isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
309 	isr &= INT_PENDING_MASK(isp);
310 	sema &= BIU_SEMA_LOCK;
311 	if (isr == 0 && sema == 0) {
312 		return (0);
313 	}
314 	*isrp = isr;
315 	if ((*semap = sema) != 0) {
316 		*mbp = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0));
317 	}
318 	return (1);
319 }
320 
321 static uint32_t
isp_sbus_rd_reg(ispsoftc_t * isp,int regoff)322 isp_sbus_rd_reg(ispsoftc_t *isp, int regoff)
323 {
324 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
325 	int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
326 	offset += (regoff & 0xff);
327 	return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset));
328 }
329 
330 static void
isp_sbus_wr_reg(ispsoftc_t * isp,int regoff,uint32_t val)331 isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
332 {
333 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
334 	int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
335 	offset += (regoff & 0xff);
336 	bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val);
337 }
338 
339 static int
isp_sbus_mbxdma(ispsoftc_t * isp)340 isp_sbus_mbxdma(ispsoftc_t *isp)
341 {
342 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
343 	bus_dma_segment_t reqseg, rspseg;
344 	int reqrs, rsprs, i, progress;
345 	size_t n;
346 	bus_size_t len;
347 
348 	if (isp->isp_rquest_dma)
349 		return (0);
350 
351 	n = isp->isp_maxcmds * sizeof (isp_hdl_t);
352 	isp->isp_xflist = (isp_hdl_t *) malloc(n, M_DEVBUF, M_WAITOK);
353 	if (isp->isp_xflist == NULL) {
354 		isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
355 		return (1);
356 	}
357 	ISP_MEMZERO(isp->isp_xflist, n);
358 	for (n = 0; n < isp->isp_maxcmds - 1; n++) {
359 		isp->isp_xflist[n].cmd = &isp->isp_xflist[n+1];
360 	}
361 	isp->isp_xffree = isp->isp_xflist;
362 	n = sizeof (bus_dmamap_t) * isp->isp_maxcmds;
363 	sbc->sbus_dmamap = (bus_dmamap_t *) malloc(n, M_DEVBUF, M_WAITOK);
364 	if (sbc->sbus_dmamap == NULL) {
365 		free(isp->isp_xflist, M_DEVBUF);
366 		isp->isp_xflist = NULL;
367 		isp_prt(isp, ISP_LOGERR, "cannot alloc dmamap array");
368 		return (1);
369 	}
370 	for (i = 0; i < isp->isp_maxcmds; i++) {
371 		/* Allocate a DMA handle */
372 		if (bus_dmamap_create(isp->isp_dmatag, MAXPHYS, 1, MAXPHYS,
373 		    1 << 24, BUS_DMA_NOWAIT, &sbc->sbus_dmamap[i]) != 0) {
374 			isp_prt(isp, ISP_LOGERR, "cmd DMA maps create error");
375 			break;
376 		}
377 	}
378 	if (i < isp->isp_maxcmds) {
379 		while (--i >= 0) {
380 			bus_dmamap_destroy(isp->isp_dmatag,
381 			    sbc->sbus_dmamap[i]);
382 		}
383 		free(isp->isp_xflist, M_DEVBUF);
384 		free(sbc->sbus_dmamap, M_DEVBUF);
385 		isp->isp_xflist = NULL;
386 		sbc->sbus_dmamap = NULL;
387 		return (1);
388 	}
389 
390 	/*
391 	 * Allocate and map the request and response queues
392 	 */
393 	progress = 0;
394 	len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
395 	if (bus_dmamem_alloc(isp->isp_dmatag, len, 0, 0, &reqseg, 1, &reqrs,
396 	    BUS_DMA_NOWAIT)) {
397 		goto dmafail;
398 	}
399 	progress++;
400 	if (bus_dmamem_map(isp->isp_dmatag, &reqseg, reqrs, len,
401 	    (void *)&isp->isp_rquest, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
402 		goto dmafail;
403 	}
404 	progress++;
405 	if (bus_dmamap_create(isp->isp_dmatag, len, 1, len, 1 << 24,
406 	    BUS_DMA_NOWAIT, &isp->isp_rqdmap) != 0) {
407 		goto dmafail;
408 	}
409 	progress++;
410 	if (bus_dmamap_load(isp->isp_dmatag, isp->isp_rqdmap,
411 	    isp->isp_rquest, len, NULL, BUS_DMA_NOWAIT) != 0) {
412 		goto dmafail;
413 	}
414 	progress++;
415 	isp->isp_rquest_dma = isp->isp_rqdmap->dm_segs[0].ds_addr;
416 
417 	len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
418 	if (bus_dmamem_alloc(isp->isp_dmatag, len, 0, 0, &rspseg, 1, &rsprs,
419 	    BUS_DMA_NOWAIT)) {
420 		goto dmafail;
421 	}
422 	progress++;
423 	if (bus_dmamem_map(isp->isp_dmatag, &rspseg, rsprs, len,
424 	    (void *)&isp->isp_result, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
425 		goto dmafail;
426 	}
427 	progress++;
428 	if (bus_dmamap_create(isp->isp_dmatag, len, 1, len, 1 << 24,
429 	    BUS_DMA_NOWAIT, &isp->isp_rsdmap) != 0) {
430 		goto dmafail;
431 	}
432 	progress++;
433 	if (bus_dmamap_load(isp->isp_dmatag, isp->isp_rsdmap,
434 	    isp->isp_result, len, NULL, BUS_DMA_NOWAIT) != 0) {
435 		goto dmafail;
436 	}
437 	isp->isp_result_dma = isp->isp_rsdmap->dm_segs[0].ds_addr;
438 
439 	return (0);
440 
441 dmafail:
442 	isp_prt(isp, ISP_LOGERR, "Mailbox DMA Setup Failure");
443 
444 	if (progress >= 8) {
445 		bus_dmamap_unload(isp->isp_dmatag, isp->isp_rsdmap);
446 	}
447 	if (progress >= 7) {
448 		bus_dmamap_destroy(isp->isp_dmatag, isp->isp_rsdmap);
449 	}
450 	if (progress >= 6) {
451 		bus_dmamem_unmap(isp->isp_dmatag,
452 		    isp->isp_result, ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)));
453 	}
454 	if (progress >= 5) {
455 		bus_dmamem_free(isp->isp_dmatag, &rspseg, rsprs);
456 	}
457 
458 	if (progress >= 4) {
459 		bus_dmamap_unload(isp->isp_dmatag, isp->isp_rqdmap);
460 	}
461 	if (progress >= 3) {
462 		bus_dmamap_destroy(isp->isp_dmatag, isp->isp_rqdmap);
463 	}
464 	if (progress >= 2) {
465 		bus_dmamem_unmap(isp->isp_dmatag,
466 		    isp->isp_rquest, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)));
467 	}
468 	if (progress >= 1) {
469 		bus_dmamem_free(isp->isp_dmatag, &reqseg, reqrs);
470 	}
471 
472 	for (i = 0; i < isp->isp_maxcmds; i++) {
473 		bus_dmamap_destroy(isp->isp_dmatag, sbc->sbus_dmamap[i]);
474 	}
475 	free(sbc->sbus_dmamap, M_DEVBUF);
476 	free(isp->isp_xflist, M_DEVBUF);
477 	isp->isp_xflist = NULL;
478 	sbc->sbus_dmamap = NULL;
479 	return (1);
480 }
481 
482 /*
483  * Map a DMA request.
484  * We're guaranteed that rq->req_handle is a value from 1 to isp->isp_maxcmds.
485  */
486 
487 static int
isp_sbus_dmasetup(struct ispsoftc * isp,struct scsipi_xfer * xs,void * arg)488 isp_sbus_dmasetup(struct ispsoftc *isp, struct scsipi_xfer *xs, void *arg)
489 {
490 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *)isp;
491 	ispreq_t *rq = arg;
492 	bus_dmamap_t dmap;
493 	bus_dma_segment_t *dm_segs;
494 	uint32_t nsegs, hidx;
495 	isp_ddir_t ddir;
496 
497 	hidx = isp_handle_index(isp, rq->req_handle);
498 	if (hidx == ISP_BAD_HANDLE_INDEX) {
499 		XS_SETERR(xs, HBA_BOTCH);
500 		return (CMD_COMPLETE);
501 	}
502 	dmap = sbc->sbus_dmamap[hidx];
503 	if (xs->datalen == 0) {
504 		ddir = ISP_NOXFR;
505 		nsegs = 0;
506 		dm_segs = NULL;
507 	 } else {
508 		int error;
509 		uint32_t flag, flg2;
510 
511 		if (xs->xs_control & XS_CTL_DATA_IN) {
512 			flg2 = BUS_DMASYNC_PREREAD;
513 			flag = BUS_DMA_READ;
514 			ddir = ISP_FROM_DEVICE;
515 		} else {
516 			flg2 = BUS_DMASYNC_PREWRITE;
517 			flag = BUS_DMA_WRITE;
518 			ddir = ISP_TO_DEVICE;
519 		}
520 		error = bus_dmamap_load(isp->isp_dmatag, dmap, xs->data, xs->datalen,
521 		    NULL, ((xs->xs_control & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | BUS_DMA_STREAMING | flag);
522 		if (error) {
523 			isp_prt(isp, ISP_LOGWARN, "unable to load DMA (%d)", error);
524 			XS_SETERR(xs, HBA_BOTCH);
525 			if (error == EAGAIN || error == ENOMEM) {
526 				return (CMD_EAGAIN);
527 			} else {
528 				return (CMD_COMPLETE);
529 			}
530 		}
531 		dm_segs = dmap->dm_segs;
532 		nsegs = dmap->dm_nsegs;
533 		bus_dmamap_sync(isp->isp_dmatag, dmap, 0, dmap->dm_mapsize, flg2);
534 	}
535 
536 	if (isp_send_cmd(isp, rq, dm_segs, nsegs, xs->datalen, ddir) != CMD_QUEUED) {
537 		return (CMD_EAGAIN);
538 	} else {
539 		return (CMD_QUEUED);
540 	}
541 }
542 
543 static void
isp_sbus_dmateardown(ispsoftc_t * isp,XS_T * xs,uint32_t handle)544 isp_sbus_dmateardown(ispsoftc_t *isp, XS_T *xs, uint32_t handle)
545 {
546 	struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
547 	bus_dmamap_t dmap;
548 	uint32_t hidx;
549 
550 	hidx = isp_handle_index(isp, handle);
551 	if (hidx == ISP_BAD_HANDLE_INDEX) {
552 		isp_xs_prt(isp, xs, ISP_LOGERR, "bad handle on teardown");
553 		return;
554 	}
555 	dmap = sbc->sbus_dmamap[hidx];
556 	bus_dmamap_sync(isp->isp_dmatag, dmap, 0,
557 	    xs->datalen, (xs->xs_control & XS_CTL_DATA_IN)?
558 	    BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
559 	bus_dmamap_unload(isp->isp_dmatag, dmap);
560 }
561