1 /* $NetBSD: if_sf_pci.c,v 1.23 2022/09/24 18:12:42 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * PCI bus front-end for the Adaptec AIC-6915 (``Starfire'')
34 * 10/100 Ethernet controller.
35 */
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: if_sf_pci.c,v 1.23 2022/09/24 18:12:42 thorpej Exp $");
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/mbuf.h>
43 #include <sys/kernel.h>
44 #include <sys/socket.h>
45 #include <sys/ioctl.h>
46 #include <sys/errno.h>
47 #include <sys/device.h>
48
49 #include <net/if.h>
50 #include <net/if_dl.h>
51 #include <net/if_media.h>
52 #include <net/if_ether.h>
53
54 #include <sys/bus.h>
55 #include <sys/intr.h>
56
57 #include <dev/mii/miivar.h>
58
59 #include <dev/ic/aic6915reg.h>
60 #include <dev/ic/aic6915var.h>
61
62 #include <dev/pci/pcireg.h>
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcidevs.h>
65
66 struct sf_pci_softc {
67 struct sf_softc sc_starfire; /* read Starfire softc */
68
69 /* PCI-specific goo. */
70 void *sc_ih; /* interrupt handle */
71 };
72
73 static int sf_pci_match(device_t, cfdata_t, void *);
74 static void sf_pci_attach(device_t, device_t, void *);
75
76 CFATTACH_DECL_NEW(sf_pci, sizeof(struct sf_pci_softc),
77 sf_pci_match, sf_pci_attach, NULL, NULL);
78
79 struct sf_pci_product {
80 uint32_t spp_vendor; /* PCI vendor ID */
81 uint32_t spp_product; /* PCI product ID */
82 const char *spp_name; /* product name */
83 const struct sf_pci_product *spp_subsys; /* subsystm IDs */
84 };
85
86 static const struct sf_pci_product sf_subsys_adaptec[] = {
87 /* ANA-62011 (rev 0) Single port 10/100 64-bit */
88 { PCI_VENDOR_ADP, 0x0008,
89 "ANA-62011 (rev 0) 10/100 Ethernet", NULL },
90
91 /* ANA-62011 (rev 1) Single port 10/100 64-bit */
92 { PCI_VENDOR_ADP, 0x0009,
93 "ANA-62011 (rev 1) 10/100 Ethernet", NULL },
94
95 /* ANA-62022 Dual port 10/100 64-bit */
96 { PCI_VENDOR_ADP, 0x0010,
97 "ANA-62022 10/100 Ethernet", NULL },
98
99 /* ANA-62044 (rev 0) Quad port 10/100 64-bit */
100 { PCI_VENDOR_ADP, 0x0018,
101 "ANA-62044 (rev 0) 10/100 Ethernet", NULL },
102
103 /* ANA-62044 (rev 1) Quad port 10/100 64-bit */
104 { PCI_VENDOR_ADP, 0x0019,
105 "ANA-62044 (rev 1) 10/100 Ethernet", NULL },
106
107 /* ANA-62020 Single port 100baseFX 64-bit */
108 { PCI_VENDOR_ADP, 0x0020,
109 "ANA-62020 100baseFX Ethernet", NULL },
110
111 /* ANA-69011 Single port 10/100 32-bit */
112 { PCI_VENDOR_ADP, 0x0028,
113 "ANA-69011 10/100 Ethernet", NULL },
114
115 { 0, 0,
116 NULL, NULL },
117 };
118
119 static const struct sf_pci_product sf_pci_products[] = {
120 { PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC6915,
121 "AIC-6915 10/100 Ethernet", sf_subsys_adaptec },
122
123 { 0, 0,
124 NULL, NULL },
125 };
126
127 static const struct sf_pci_product *
sf_pci_lookup(const struct pci_attach_args * pa)128 sf_pci_lookup(const struct pci_attach_args *pa)
129 {
130 const struct sf_pci_product *spp, *subspp;
131 pcireg_t subsysid;
132
133 for (spp = sf_pci_products; spp->spp_name != NULL; spp++) {
134 if (PCI_VENDOR(pa->pa_id) == spp->spp_vendor &&
135 PCI_PRODUCT(pa->pa_id) == spp->spp_product) {
136 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag,
137 PCI_SUBSYS_ID_REG);
138 for (subspp = spp->spp_subsys;
139 subspp->spp_name != NULL; subspp++) {
140 if (PCI_VENDOR(subsysid) ==
141 subspp->spp_vendor ||
142 PCI_PRODUCT(subsysid) ==
143 subspp->spp_product) {
144 return (subspp);
145 }
146 }
147 return (spp);
148 }
149 }
150
151 return (NULL);
152 }
153
154 static int
sf_pci_match(device_t parent,cfdata_t match,void * aux)155 sf_pci_match(device_t parent, cfdata_t match, void *aux)
156 {
157 struct pci_attach_args *pa = aux;
158
159 if (sf_pci_lookup(pa) != NULL)
160 return (1);
161
162 return (0);
163 }
164
165 static void
sf_pci_attach(device_t parent,device_t self,void * aux)166 sf_pci_attach(device_t parent, device_t self, void *aux)
167 {
168 struct sf_pci_softc *psc = device_private(self);
169 struct sf_softc *sc = &psc->sc_starfire;
170 struct pci_attach_args *pa = aux;
171 pci_intr_handle_t ih;
172 const char *intrstr = NULL;
173 const struct sf_pci_product *spp;
174 bus_space_tag_t iot, memt;
175 bus_space_handle_t ioh, memh;
176 pcireg_t reg;
177 int error, ioh_valid, memh_valid;
178 char intrbuf[PCI_INTRSTR_LEN];
179
180 sc->sc_dev = self;
181 spp = sf_pci_lookup(pa);
182 if (spp == NULL) {
183 printf("\n");
184 panic("sf_pci_attach: impossible");
185 }
186
187 printf(": %s, rev. %d\n", spp->spp_name, PCI_REVISION(pa->pa_class));
188
189 /* power up chip */
190 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, NULL)) &&
191 error != EOPNOTSUPP) {
192 aprint_error_dev(self, "cannot activate %d\n", error);
193 return;
194 }
195
196 /*
197 * Map the device.
198 */
199 reg = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SF_PCI_MEMBA);
200 switch (reg) {
201 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
202 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
203 memh_valid = (pci_mapreg_map(pa, SF_PCI_MEMBA,
204 reg, 0, &memt, &memh, NULL, NULL) == 0);
205 break;
206 default:
207 memh_valid = 0;
208 }
209
210 ioh_valid = (pci_mapreg_map(pa,
211 (reg == (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT)) ?
212 SF_PCI_IOBA : SF_PCI_IOBA - 0x04,
213 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, NULL) == 0);
214
215 if (memh_valid) {
216 sc->sc_st = memt;
217 sc->sc_sh = memh;
218 sc->sc_iomapped = 0;
219 } else if (ioh_valid) {
220 sc->sc_st = iot;
221 sc->sc_sh = ioh;
222 sc->sc_iomapped = 1;
223 } else {
224 aprint_error_dev(self, "unable to map device registers\n");
225 return;
226 }
227
228 sc->sc_dmat = pa->pa_dmat;
229
230 /* Make sure bus mastering is enabled. */
231 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
232 pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
233 PCI_COMMAND_MASTER_ENABLE);
234
235 /*
236 * Map and establish our interrupt.
237 */
238 if (pci_intr_map(pa, &ih)) {
239 aprint_error_dev(self, "unable to map interrupt\n");
240 return;
241 }
242 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
243 psc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_NET, sf_intr,
244 sc, device_xname(self));
245 if (psc->sc_ih == NULL) {
246 aprint_error_dev(self, "unable to establish interrupt");
247 if (intrstr != NULL)
248 aprint_error(" at %s", intrstr);
249 aprint_error("\n");
250 return;
251 }
252 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
253
254 /*
255 * Finish off the attach.
256 */
257 sf_attach(sc);
258 }
259