xref: /netbsd-src/sys/dev/pci/if_hme_pci.c (revision 1e7f294dc201a9ab462b6a51cf368f7fbac00e44)
1 /*	$NetBSD: if_hme_pci.c,v 1.40 2022/09/24 18:12:42 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 Matthew R. Green
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * PCI front-end device driver for the HME ethernet device.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: if_hme_pci.c,v 1.40 2022/09/24 18:12:42 thorpej Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/syslog.h>
39 #include <sys/device.h>
40 #include <sys/socket.h>
41 
42 #include <net/if.h>
43 #include <net/if_dl.h>
44 #include <net/if_ether.h>
45 #include <net/if_media.h>
46 
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
49 
50 #include <sys/intr.h>
51 
52 #include <dev/pci/pcivar.h>
53 #include <dev/pci/pcireg.h>
54 #include <dev/pci/pcidevs.h>
55 
56 #include <dev/ic/hmevar.h>
57 
58 #define PCI_HME_BASEADDR	PCI_BAR(0)
59 
60 struct hme_pci_softc {
61 	struct	hme_softc	hsc_hme;	/* HME device */
62 	bus_space_tag_t		hsc_memt;
63 	bus_space_handle_t	hsc_memh;
64 	void			*hsc_ih;
65 };
66 
67 int	hmematch_pci(device_t, cfdata_t, void *);
68 void	hmeattach_pci(device_t, device_t, void *);
69 
70 CFATTACH_DECL_NEW(hme_pci, sizeof(struct hme_pci_softc),
71     hmematch_pci, hmeattach_pci, NULL, NULL);
72 
73 int
hmematch_pci(device_t parent,cfdata_t cf,void * aux)74 hmematch_pci(device_t parent, cfdata_t cf, void *aux)
75 {
76 	struct pci_attach_args *pa = aux;
77 
78 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
79 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_HMENETWORK)
80 		return (1);
81 
82 	return (0);
83 }
84 
85 static inline int
hmepromvalid(uint8_t * buf)86 hmepromvalid(uint8_t* buf)
87 {
88 	return buf[0] == 0x18 && buf[1] == 0x00 &&	/* structure length */
89 	    buf[2] == 0x00 &&				/* revision */
90 	    (buf[3] == 0x00 ||				/* hme */
91 	     buf[3] == 0x80) &&				/* qfe */
92 	    buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET &&	/* subclass code */
93 	    buf[5] == PCI_CLASS_NETWORK;		/* class code */
94 }
95 
96 static inline int
hmevpdoff(bus_space_tag_t romt,bus_space_handle_t romh,int vpdoff,int dev)97 hmevpdoff(bus_space_tag_t romt, bus_space_handle_t romh, int vpdoff, int dev)
98 {
99 #define VPDLEN (3 + sizeof(struct pci_vpd) + ETHER_ADDR_LEN)
100 	if (bus_space_read_1(romt, romh, vpdoff + VPDLEN) != 0x79 &&
101 	    bus_space_read_1(romt, romh, vpdoff + 4 * VPDLEN) == 0x79) {
102 		/*
103 		 * Use the Nth NA for the Nth HME on
104 		 * this SUNW,qfe.
105 		 */
106 		vpdoff += dev * VPDLEN;
107 	}
108 	return vpdoff;
109 }
110 
111 void
hmeattach_pci(device_t parent,device_t self,void * aux)112 hmeattach_pci(device_t parent, device_t self, void *aux)
113 {
114 	struct pci_attach_args *pa = aux;
115 	struct hme_pci_softc *hsc = device_private(self);
116 	struct hme_softc *sc = &hsc->hsc_hme;
117 	pci_intr_handle_t ih;
118 	pcireg_t csr;
119 	const char *intrstr;
120 	int type;
121 	struct pci_attach_args	ebus_pa;
122 	prop_data_t		eaddrprop;
123 	pcireg_t		ebus_cl, ebus_id;
124 	uint8_t			*enaddr;
125 	bus_space_tag_t		romt;
126 	bus_space_handle_t	romh;
127 	bus_size_t		romsize;
128 	uint8_t			buf[64];
129 	int			dataoff, vpdoff;
130 	struct pci_vpd		*vpd;
131 	static const uint8_t promhdr[] = { 0x55, 0xaa };
132 #define PROMHDR_PTR_DATA	0x18
133 	static const uint8_t promdat[] = {
134 		0x50, 0x43, 0x49, 0x52,		/* "PCIR" */
135 		PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8,
136 		PCI_PRODUCT_SUN_HMENETWORK & 0xff,
137 		PCI_PRODUCT_SUN_HMENETWORK >> 8
138 	};
139 #define PROMDATA_PTR_VPD	0x08
140 #define PROMDATA_DATA2		0x0a
141 	char intrbuf[PCI_INTRSTR_LEN];
142 
143 	sc->sc_dev = self;
144 
145 	aprint_normal(": Sun Happy Meal Ethernet, rev. %d\n",
146 	    PCI_REVISION(pa->pa_class));
147 	aprint_naive(": Ethernet controller\n");
148 
149 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
150 	type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_HME_BASEADDR);
151 
152 	/*
153 	 * enable io/memory-space accesses.  this is kinda of gross; but
154 	 * the hme comes up with neither IO space enabled, or memory space.
155 	 */
156 	switch (type) {
157 	case PCI_MAPREG_TYPE_MEM:
158 		csr |= PCI_COMMAND_MEM_ENABLE;
159 		sc->sc_bustag = pa->pa_memt;
160 		break;
161 	case PCI_MAPREG_TYPE_IO:
162 		csr |= PCI_COMMAND_IO_ENABLE;
163 		sc->sc_bustag = pa->pa_iot;
164 		break;
165 	}
166 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
167 	    csr | PCI_COMMAND_MEM_ENABLE);
168 
169 	sc->sc_dmatag = pa->pa_dmat;
170 
171 	sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
172 	/*
173 	 * Map five register banks:
174 	 *
175 	 *	bank 0: HME SEB registers:	+0x0000
176 	 *	bank 1: HME ETX registers:	+0x2000
177 	 *	bank 2: HME ERX registers:	+0x4000
178 	 *	bank 3: HME MAC registers:	+0x6000
179 	 *	bank 4: HME MIF registers:	+0x7000
180 	 *
181 	 */
182 
183 	if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0,
184 	    &hsc->hsc_memt, &hsc->hsc_memh, NULL, NULL) != 0) {
185 		aprint_error_dev(self, "unable to map device registers\n");
186 		return;
187 	}
188 	sc->sc_seb = hsc->hsc_memh;
189 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x2000,
190 	    0x1000, &sc->sc_etx)) {
191 		aprint_error_dev(self, "unable to subregion ETX registers\n");
192 		return;
193 	}
194 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x4000,
195 	    0x1000, &sc->sc_erx)) {
196 		aprint_error_dev(self, "unable to subregion ERX registers\n");
197 		return;
198 	}
199 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x6000,
200 	    0x1000, &sc->sc_mac)) {
201 		aprint_error_dev(self, "unable to subregion MAC registers\n");
202 		return;
203 	}
204 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x7000,
205 	    0x1000, &sc->sc_mif)) {
206 		aprint_error_dev(self, "unable to subregion MIF registers\n");
207 		return;
208 	}
209 
210 
211 	/*
212 	 * Check if we got a mac-address property passed
213 	 */
214 	eaddrprop = prop_dictionary_get(device_properties(self), "mac-address");
215 
216 	if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) {
217 		memcpy(&sc->sc_enaddr, prop_data_value(eaddrprop),
218 			    ETHER_ADDR_LEN);
219 		goto got_eaddr;
220 	}
221 
222 	/*
223 	 * Dig out VPD (vital product data) and acquire Ethernet address.
224 	 * The VPD of hme resides in the Boot PROM (PCI FCode) attached
225 	 * to the EBus interface.
226 	 */
227 	/*
228 	 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
229 	 * chapter 2 describes the data structure.
230 	 */
231 
232 	enaddr = NULL;
233 
234 	/* get a PCI tag for the EBus bridge (function 0 of the same device) */
235 	ebus_pa = *pa;
236 	ebus_pa.pa_tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 0);
237 
238 	ebus_cl = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_CLASS_REG);
239 	ebus_id = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_ID_REG);
240 
241 #define PCI_EBUS2_BOOTROM	0x10
242 	if (PCI_CLASS(ebus_cl) == PCI_CLASS_BRIDGE &&
243 	    PCI_PRODUCT(ebus_id) == PCI_PRODUCT_SUN_EBUS &&
244 	    pci_mapreg_map(&ebus_pa, PCI_EBUS2_BOOTROM, PCI_MAPREG_TYPE_MEM,
245 		BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_PREFETCHABLE,
246 		&romt, &romh, 0, &romsize) == 0) {
247 
248 		/* read PCI Expansion PROM Header */
249 		bus_space_read_region_1(romt, romh, 0, buf, sizeof buf);
250 		if (memcmp(buf, promhdr, sizeof promhdr) == 0 &&
251 		    (dataoff = (buf[PROMHDR_PTR_DATA] |
252 			(buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) {
253 
254 			/* read PCI Expansion PROM Data */
255 			bus_space_read_region_1(romt, romh, dataoff,
256 			    buf, sizeof buf);
257 			if (memcmp(buf, promdat, sizeof promdat) == 0 &&
258 			    hmepromvalid(buf + PROMDATA_DATA2) &&
259 			    (vpdoff = (buf[PROMDATA_PTR_VPD] |
260 				(buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) {
261 
262 				/*
263 				 * The VPD of hme is not in PCI 2.2 standard
264 				 * format.  The length in the resource header
265 				 * is in big endian, and resources are not
266 				 * properly terminated (only one resource
267 				 * and no end tag).
268 				 */
269 				vpdoff = hmevpdoff(romt, romh, vpdoff,
270 				    pa->pa_device);
271 				/* read PCI VPD */
272 				bus_space_read_region_1(romt, romh,
273 				    vpdoff, buf, sizeof buf);
274 				vpd = (void *)(buf + 3);
275 				if (PCI_VPDRES_ISLARGE(buf[0]) &&
276 				    PCI_VPDRES_LARGE_NAME(buf[0])
277 					== PCI_VPDRES_TYPE_VPD &&
278 				    /* buf[1] == 0 && buf[2] == 9 && */ /*len*/
279 				    vpd->vpd_key0 == 0x4e /* N */ &&
280 				    vpd->vpd_key1 == 0x41 /* A */ &&
281 				    vpd->vpd_len == ETHER_ADDR_LEN) {
282 					/*
283 					 * Ethernet address found
284 					 */
285 					enaddr = buf + 6;
286 				}
287 			}
288 		}
289 		bus_space_unmap(romt, romh, romsize);
290 	}
291 
292 	if (enaddr) {
293 		memcpy(sc->sc_enaddr, enaddr, ETHER_ADDR_LEN);
294 		goto got_eaddr;
295 	}
296 
297 	aprint_error_dev(self, "no Ethernet address found\n");
298 got_eaddr:
299 
300 	/*
301 	 * Map and establish our interrupt.
302 	 */
303 	if (pci_intr_map(pa, &ih) != 0) {
304 		aprint_error_dev(self, "unable to map interrupt\n");
305 		return;
306 	}
307 	intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
308 	hsc->hsc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_NET, hme_intr,
309 	    sc, device_xname(self));
310 	if (hsc->hsc_ih == NULL) {
311 		aprint_error_dev(self, "unable to establish interrupt");
312 		if (intrstr != NULL)
313 			aprint_error(" at %s", intrstr);
314 		aprint_error("\n");
315 		return;
316 	}
317 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
318 
319 	sc->sc_burst = 16;	/* XXX */
320 
321 	/* Finish off the attach. */
322 	hme_config(sc);
323 }
324