1 /* $NetBSD: if_cs_ofisa.c,v 1.32 2021/04/28 03:34:02 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: if_cs_ofisa.c,v 1.32 2021/04/28 03:34:02 thorpej Exp $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/socket.h>
39 #include <sys/device.h>
40 #include <sys/malloc.h>
41
42 #include <sys/rndsource.h>
43
44 #include <net/if.h>
45 #include <net/if_ether.h>
46 #include <net/if_media.h>
47 #ifdef INET
48 #include <netinet/in.h>
49 #include <netinet/if_inarp.h>
50 #endif
51
52 #include <sys/bus.h>
53 #include <sys/intr.h>
54
55 #include <dev/ofw/openfirm.h>
56 #include <dev/isa/isavar.h>
57 #include <dev/ofisa/ofisavar.h>
58
59 #include <dev/ic/cs89x0reg.h>
60 #include <dev/ic/cs89x0var.h>
61 #include <dev/isa/cs89x0isavar.h>
62
63 static int cs_ofisa_match(device_t, cfdata_t, void *);
64 static void cs_ofisa_attach(device_t, device_t, void *);
65
66 CFATTACH_DECL_NEW(cs_ofisa, sizeof(struct cs_softc_isa),
67 cs_ofisa_match, cs_ofisa_attach, NULL, NULL);
68
69 static const struct device_compatible_entry compat_data[] = {
70 { .compat = "CRUS,CS8900" },
71 /* XXX CS8920, CS8920M? */
72 /* XXX PNP names? */
73 DEVICE_COMPAT_EOL
74 };
75
76 int
cs_ofisa_match(device_t parent,cfdata_t cf,void * aux)77 cs_ofisa_match(device_t parent, cfdata_t cf, void *aux)
78 {
79 struct ofisa_attach_args *aa = aux;
80 int rv;
81
82 rv = of_compatible_match(aa->oba.oba_phandle, compat_data) ? 5 : 0;
83 #ifdef _CS_OFISA_MD_MATCH
84 if (rv == 0)
85 rv = cs_ofisa_md_match(parent, cf, aux);
86 #endif
87 return (rv);
88 }
89
90 void
cs_ofisa_attach(device_t parent,device_t self,void * aux)91 cs_ofisa_attach(device_t parent, device_t self, void *aux)
92 {
93 struct cs_softc_isa *isc = device_private(self);
94 struct cs_softc *sc = &isc->sc_cs;
95 struct ofisa_attach_args *aa = aux;
96 struct ofisa_reg_desc reg[2];
97 struct ofisa_intr_desc intr;
98 struct ofisa_dma_desc dma;
99 int i, n, *media, nmedia, defmedia;
100 bus_addr_t io_addr, mem_addr;
101 const char *message = NULL;
102 u_int8_t enaddr[6];
103
104 sc->sc_dev = self;
105 isc->sc_ic = aa->ic;
106 sc->sc_iot = aa->iot;
107 sc->sc_memt = aa->memt;
108
109 /*
110 * We're living on an OFW. We have to ask the OFW what our
111 * registers and interrupts properties look like.
112 *
113 * We expect:
114 *
115 * 1 i/o register region
116 * 0 or 1 memory region
117 * 1 interrupt
118 * 0 or 1 DMA channel
119 */
120
121 io_addr = mem_addr = -1;
122
123 n = ofisa_reg_get(aa->oba.oba_phandle, reg, 2);
124 #ifdef _CS_OFISA_MD_REG_FIXUP
125 n = cs_ofisa_md_reg_fixup(parent, self, aux, reg, 2, n);
126 #endif
127 if (n < 1 || n > 2) {
128 aprint_error(": error getting register data\n");
129 return;
130 }
131
132 for (i = 0; i < n; i++) {
133 if (reg[i].type == OFISA_REG_TYPE_IO) {
134 if (io_addr != (bus_addr_t) -1) {
135 aprint_error(": multiple I/O regions\n");
136 return;
137 }
138 if (reg[i].len != CS8900_IOSIZE) {
139 aprint_error(": weird register size (%lu, expected %d)\n",
140 (unsigned long)reg[i].len, CS8900_IOSIZE);
141 return;
142 }
143 io_addr = reg[i].addr;
144 } else {
145 if (mem_addr != (bus_addr_t) -1) {
146 aprint_error(": multiple memory regions\n");
147 return;
148 }
149 if (reg[i].len != CS8900_MEMSIZE) {
150 aprint_error(": weird register size (%lu, expected %d)\n",
151 (unsigned long)reg[i].len, CS8900_MEMSIZE);
152 return;
153 }
154 mem_addr = reg[i].addr;
155 }
156 }
157
158 n = ofisa_intr_get(aa->oba.oba_phandle, &intr, 1);
159 #ifdef _CS_OFISA_MD_INTR_FIXUP
160 n = cs_ofisa_md_intr_fixup(parent, self, aux, &intr, 1, n);
161 #endif
162 if (n != 1) {
163 aprint_error(": error getting interrupt data\n");
164 return;
165 }
166 sc->sc_irq = intr.irq;
167
168 if (CS8900_IRQ_ISVALID(sc->sc_irq) == 0) {
169 aprint_error(": invalid IRQ %d\n", sc->sc_irq);
170 return;
171 }
172
173 isc->sc_drq = -1;
174 n = ofisa_dma_get(aa->oba.oba_phandle, &dma, 1);
175 #ifdef _CS_OFISA_MD_DMA_FIXUP
176 n = cs_ofisa_md_dma_fixup(parent, self, aux, &dma, 1, n);
177 #endif
178 if (n == 1)
179 isc->sc_drq = dma.drq;
180
181 if (io_addr == (bus_addr_t) -1) {
182 aprint_error(": no I/O space\n");
183 return;
184 }
185 if (bus_space_map(sc->sc_iot, io_addr, CS8900_IOSIZE, 0,
186 &sc->sc_ioh)) {
187 aprint_error(": unable to map register space\n");
188 return;
189 }
190
191 if (mem_addr != (bus_addr_t) -1) {
192 if (bus_space_map(sc->sc_memt, mem_addr, CS8900_MEMSIZE, 0,
193 &sc->sc_memh)) {
194 message = "unable to map memory space";
195 } else {
196 sc->sc_cfgflags |= CFGFLG_MEM_MODE;
197 sc->sc_pktpgaddr = mem_addr;
198 }
199 }
200
201 /* Dig MAC address out of the firmware. */
202 if (OF_getprop(aa->oba.oba_phandle, "mac-address", enaddr,
203 sizeof(enaddr)) < 0) {
204 aprint_error(": unable to get Ethernet address\n");
205 return;
206 }
207
208 /* Dig media out of the firmware. */
209 media = of_network_decode_media(aa->oba.oba_phandle, &nmedia,
210 &defmedia);
211 #ifdef _CS_OFISA_MD_MEDIA_FIXUP
212 media = cs_ofisa_md_media_fixup(parent, self, aux, media, &nmedia,
213 &defmedia);
214 #endif
215 if (media == NULL) {
216 aprint_error(": unable to get media information\n");
217 return;
218 }
219
220 ofisa_print_model(NULL, aa->oba.oba_phandle);
221 if (message != NULL)
222 aprint_normal_dev(self, "%s\n", message);
223
224 if (defmedia == -1) {
225 aprint_error_dev(self, "unable to get default media\n");
226 defmedia = media[0]; /* XXX What to do? */
227 }
228
229 sc->sc_ih = isa_intr_establish(isc->sc_ic, sc->sc_irq, intr.share,
230 IPL_NET, cs_intr, sc);
231 if (sc->sc_ih == NULL) {
232 aprint_error_dev(self, "unable to establish interrupt\n");
233 return;
234 }
235
236 #ifdef _CS_OFISA_MD_CFGFLAGS_FIXUP
237 sc->sc_cfgflags |= cs_ofisa_md_cfgflags_fixup(parent, self, aux);
238 #endif
239
240 sc->sc_dma_chipinit = cs_isa_dma_chipinit;
241 sc->sc_dma_attach = cs_isa_dma_attach;
242 sc->sc_dma_process_rx = cs_process_rx_dma;
243
244 cs_attach(sc, enaddr, media, nmedia, defmedia);
245
246 /* This is malloc'd. */
247 free(media, M_DEVBUF);
248 }
249