1 /* $NetBSD: gphyter.c,v 1.37 2020/03/15 23:04:50 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 */
56
57 /*
58 * driver for National Semiconductor's DP83891, DP83861 and DP83865
59 * `Gig PHYTER' ethernet 10/100/1000 PHYs. The DP83891 is an older,
60 * non-firmware-driven version of the DP83861. The DP83865 is a low
61 * power version of the DP83861.
62 *
63 * Data Sheets available from www.national.com:
64 * http://www.national.com/ds/DP/DP83861.pdf
65 * http://www.national.com/ds/DP/DP83865.pdf
66 */
67
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: gphyter.c,v 1.37 2020/03/15 23:04:50 thorpej Exp $");
70
71 #include <sys/param.h>
72 #include <sys/systm.h>
73 #include <sys/kernel.h>
74 #include <sys/device.h>
75 #include <sys/socket.h>
76 #include <sys/errno.h>
77
78 #include <net/if.h>
79 #include <net/if_media.h>
80
81 #include <dev/mii/mii.h>
82 #include <dev/mii/miivar.h>
83 #include <dev/mii/miidevs.h>
84
85 #include <dev/mii/gphyterreg.h>
86
87 static int gphytermatch(device_t, cfdata_t, void *);
88 static void gphyterattach(device_t, device_t, void *);
89
90 CFATTACH_DECL_NEW(gphyter, sizeof(struct mii_softc),
91 gphytermatch, gphyterattach, mii_phy_detach, mii_phy_activate);
92
93 static int gphyter_service(struct mii_softc *, struct mii_data *, int);
94 static void gphyter_status(struct mii_softc *);
95 static void gphyter_reset(struct mii_softc *);
96
97 static const struct mii_phy_funcs gphyter_funcs = {
98 gphyter_service, gphyter_status, gphyter_reset,
99 };
100
101 static const struct mii_phydesc gphyters[] = {
102 MII_PHY_DESC(xxNATSEMI, DP83861),
103 MII_PHY_DESC(xxNATSEMI, DP83865),
104 MII_PHY_DESC(xxNATSEMI, DP83891),
105 MII_PHY_END,
106 };
107
108 static int
gphytermatch(device_t parent,cfdata_t match,void * aux)109 gphytermatch(device_t parent, cfdata_t match, void *aux)
110 {
111 struct mii_attach_args *ma = aux;
112
113 if (mii_phy_match(ma, gphyters) != NULL)
114 return 10;
115
116 return 0;
117 }
118
119 static void
gphyterattach(device_t parent,device_t self,void * aux)120 gphyterattach(device_t parent, device_t self, void *aux)
121 {
122 struct mii_softc *sc = device_private(self);
123 struct mii_attach_args *ma = aux;
124 struct mii_data *mii = ma->mii_data;
125 const struct mii_phydesc *mpd;
126 uint16_t anar, strap;
127
128 mpd = mii_phy_match(ma, gphyters);
129 aprint_naive(": Media interface\n");
130 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
131
132 sc->mii_dev = self;
133 sc->mii_inst = mii->mii_instance;
134 sc->mii_phy = ma->mii_phyno;
135 sc->mii_funcs = &gphyter_funcs;
136 sc->mii_pdata = mii;
137 sc->mii_flags = ma->mii_flags;
138
139 mii_lock(mii);
140
141 PHY_RESET(sc);
142
143 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
144 sc->mii_capabilities &= ma->mii_capmask;
145 if (sc->mii_capabilities & BMSR_EXTSTAT)
146 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
147
148 /*
149 * The Gig PHYTER seems to have the 10baseT BMSR bits hard-wired to 0,
150 * even though the device supports 10baseT. What we do instead is read
151 * the post-reset ANAR, who's 10baseT-related bits are set by strapping
152 * pin 180, and fake the BMSR bits.
153 */
154 PHY_READ(sc, MII_ANAR, &anar);
155 if (anar & ANAR_10)
156 sc->mii_capabilities |= (BMSR_10THDX & ma->mii_capmask);
157 if (anar & ANAR_10_FD)
158 sc->mii_capabilities |= (BMSR_10TFDX & ma->mii_capmask);
159
160 mii_unlock(mii);
161
162 mii_phy_add_media(sc);
163
164 mii_lock(mii);
165 PHY_READ(sc, MII_GPHYTER_STRAP, &strap);
166 mii_unlock(mii);
167 aprint_normal_dev(self, "strapped to %s mode",
168 (strap & STRAP_MS_VAL) ? "master" : "slave");
169 if (strap & STRAP_NC_MODE)
170 aprint_normal(", pre-C5 BCM5400 compat enabled");
171 aprint_normal("\n");
172 }
173
174 static int
gphyter_service(struct mii_softc * sc,struct mii_data * mii,int cmd)175 gphyter_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
176 {
177 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
178 uint16_t reg;
179
180 KASSERT(mii_locked(mii));
181
182 switch (cmd) {
183 case MII_POLLSTAT:
184 /* If we're not polling our PHY instance, just return. */
185 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
186 return 0;
187 break;
188
189 case MII_MEDIACHG:
190 /*
191 * If the media indicates a different PHY instance,
192 * isolate ourselves.
193 */
194 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
195 PHY_READ(sc, MII_BMCR, ®);
196 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
197 return 0;
198 }
199
200 /* If the interface is not up, don't do anything. */
201 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
202 break;
203
204 mii_phy_setmedia(sc);
205 break;
206
207 case MII_TICK:
208 /* If we're not currently selected, just return. */
209 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
210 return 0;
211
212 if (mii_phy_tick(sc) == EJUSTRETURN)
213 return 0;
214 break;
215
216 case MII_DOWN:
217 mii_phy_down(sc);
218 return 0;
219 }
220
221 /* Update the media status. */
222 mii_phy_status(sc);
223
224 /* Callback if something changed. */
225 mii_phy_update(sc, cmd);
226 return 0;
227 }
228
229 static void
gphyter_status(struct mii_softc * sc)230 gphyter_status(struct mii_softc *sc)
231 {
232 struct mii_data *mii = sc->mii_pdata;
233 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
234 uint16_t bmsr, bmcr, physup, gtsr;
235
236 KASSERT(mii_locked(mii));
237
238 mii->mii_media_status = IFM_AVALID;
239 mii->mii_media_active = IFM_ETHER;
240
241 PHY_READ(sc, MII_BMSR, &bmsr);
242 PHY_READ(sc, MII_BMSR, &bmsr);
243
244 PHY_READ(sc, MII_GPHYTER_PHY_SUP, &physup);
245
246 if (physup & PHY_SUP_LINK)
247 mii->mii_media_status |= IFM_ACTIVE;
248
249 PHY_READ(sc, MII_BMCR, &bmcr);
250 if (bmcr & BMCR_ISO) {
251 mii->mii_media_active |= IFM_NONE;
252 mii->mii_media_status = 0;
253 return;
254 }
255
256 if (bmcr & BMCR_LOOP)
257 mii->mii_media_active |= IFM_LOOP;
258
259 if (bmcr & BMCR_AUTOEN) {
260 /*
261 * The media status bits are only valid if autonegotiation
262 * has completed (or it's disabled).
263 */
264 if ((bmsr & BMSR_ACOMP) == 0) {
265 /* Erg, still trying, I guess... */
266 mii->mii_media_active |= IFM_NONE;
267 return;
268 }
269
270 switch (physup & (PHY_SUP_SPEED1 | PHY_SUP_SPEED0)) {
271 case PHY_SUP_SPEED1:
272 mii->mii_media_active |= IFM_1000_T;
273 PHY_READ(sc, MII_100T2SR, >sr);
274 if (gtsr & GTSR_MS_RES)
275 mii->mii_media_active |= IFM_ETH_MASTER;
276 break;
277
278 case PHY_SUP_SPEED0:
279 mii->mii_media_active |= IFM_100_TX;
280 break;
281
282 case 0:
283 mii->mii_media_active |= IFM_10_T;
284 break;
285
286 default:
287 mii->mii_media_active |= IFM_NONE;
288 mii->mii_media_status = 0;
289 }
290 if (physup & PHY_SUP_DUPLEX)
291 mii->mii_media_active |=
292 IFM_FDX | mii_phy_flowstatus(sc);
293 else
294 mii->mii_media_active |= IFM_HDX;
295 } else
296 mii->mii_media_active = ife->ifm_media;
297 }
298
299 void
gphyter_reset(struct mii_softc * sc)300 gphyter_reset(struct mii_softc *sc)
301 {
302 int i;
303 uint16_t reg;
304
305 KASSERT(mii_locked(sc->mii_pdata));
306
307 if (sc->mii_flags & MIIF_NOISOLATE)
308 reg = BMCR_RESET;
309 else
310 reg = BMCR_RESET | BMCR_ISO;
311 PHY_WRITE(sc, MII_BMCR, reg);
312
313 /*
314 * It is best to allow a little time for the reset to settle in before
315 * we start polling the BMCR again. Notably, the DP83840A manual
316 * states that there should be a 500us delay between asserting software
317 * reset and attempting MII serial operations. Also, a DP83815 can get
318 * into a bad state on cable removal and reinsertion if we do not
319 * delay here.
320 */
321 delay(500);
322
323 /* Wait another 100ms for it to complete. */
324 for (i = 0; i < 100; i++) {
325 PHY_READ(sc, MII_BMCR, ®);
326 if ((reg & BMCR_RESET) == 0)
327 break;
328 delay(1000);
329 }
330
331 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
332 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
333 }
334