1 /* $NetBSD: ac100.c,v 1.7 2021/01/27 02:29:48 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "opt_fdt.h"
30
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: ac100.c,v 1.7 2021/01/27 02:29:48 thorpej Exp $");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38 #include <sys/conf.h>
39 #include <sys/bus.h>
40 #include <sys/kmem.h>
41
42 #include <dev/clock_subr.h>
43
44 #include <dev/i2c/i2cvar.h>
45
46 #ifdef FDT
47 #include <dev/fdt/fdtvar.h>
48 #endif
49
50 #define AC100_CHIP_AUDIO_RST_REG 0x00
51 #define AC100_PLL_CTRL1_REG 0x02
52 #define AC100_PLL_CTRL2_REG 0x03
53 #define AC100_SYSCLK_CTRL_REG 0x04
54 #define AC100_MOD_RST_CTRL_REG 0x05
55 #define AC100_ADDA_SR_CTRL_REG 0x06
56 #define AC100_I2S1_LCK_CTRL_REG 0x10
57 #define AC100_I2S1_SDIN_CTRL_REG 0x11
58 #define AC100_I2S1_SDOUT_CTRL_REG 0x12
59 #define AC100_I2S1_DIG_MIXER_REG 0x13
60 #define AC100_I2S1_VOL_CTRL1_REG 0x14
61 #define AC100_I2S1_VOL_CTRL2_REG 0x15
62 #define AC100_I2S1_VOL_CTRL3_REG 0x16
63 #define AC100_I2S1_VOL_CTRL4_REG 0x17
64 #define AC100_I2S1_MXR_GAIN_REG 0x18
65 #define AC100_I2S2_CLK_CTRL_REG 0x20
66 #define AC100_I2S2_SDIN_CTRL_REG 0x21
67 #define AC100_I2S2_SDOUT_CTRL_REG 0x22
68 #define AC100_I2S2_DIG_MIXER_REG 0x23
69 #define AC100_I2S2_VOL_CTRL1_REG 0x24
70 #define AC100_I2S2_VOL_CTRL2_REG 0x26
71 #define AC100_I2S2_MXR_GAIN_REG 0x28
72 #define AC100_I2S3_CLK_CTRL_REG 0x30
73 #define AC100_I2S3_SDIN_CTRL_REG 0x31
74 #define AC100_I2S3_SDOUT_CTRL_REG 0x32
75 #define AC100_I2S3_SGP_CTRL_REG 0x33
76 #define AC100_ADC_DIG_CTRL_REG 0x40
77
78 #define AC100_RTC_RESET_REG 0xc6
79 #define AC100_RTC_CTRL_REG 0xc7
80 #define AC100_RTC_SEC_REG 0xc8
81 #define AC100_RTC_MIN_REG 0xc9
82 #define AC100_RTC_HOU_REG 0xca
83 #define AC100_RTC_WEE_REG 0xcb
84 #define AC100_RTC_DAY_REG 0xcc
85 #define AC100_RTC_MON_REG 0xcd
86 #define AC100_RTC_YEA_REG 0xce
87 #define AC100_RTC_UPD_TRIG_REG 0xcf
88
89 #define AC100_RTC_GP_REG(n) (0xe0 + (n))
90
91 #define AC100_RTC_CTRL_12H_24H_MODE __BIT(0)
92
93 #define AC100_RTC_UPD_TRIG_WRITE __BIT(15)
94
95 static const struct device_compatible_entry compat_data[] = {
96 { .compat = "x-powers,ac100" },
97 DEVICE_COMPAT_EOL
98 };
99
100 struct ac100_softc {
101 device_t sc_dev;
102 i2c_tag_t sc_i2c;
103 i2c_addr_t sc_addr;
104
105 struct todr_chip_handle sc_todr;
106 };
107
108 static int ac100_match(device_t, cfdata_t, void *);
109 static void ac100_attach(device_t, device_t, void *);
110
111 static int ac100_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
112 static int ac100_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *);
113
114 static int ac100_read(struct ac100_softc *, uint8_t, uint16_t *);
115 static int ac100_write(struct ac100_softc *, uint8_t, uint16_t);
116
117 CFATTACH_DECL_NEW(ac100ic, sizeof(struct ac100_softc),
118 ac100_match, ac100_attach, NULL, NULL);
119
120 static int
ac100_match(device_t parent,cfdata_t match,void * aux)121 ac100_match(device_t parent, cfdata_t match, void *aux)
122 {
123 struct i2c_attach_args *ia = aux;
124 int match_result;
125
126 if (iic_use_direct_match(ia, match, compat_data, &match_result))
127 return match_result;
128
129 /* This device is direct-config only. */
130
131 return 0;
132 }
133
134 static void
ac100_attach(device_t parent,device_t self,void * aux)135 ac100_attach(device_t parent, device_t self, void *aux)
136 {
137 struct ac100_softc *sc = device_private(self);
138 struct i2c_attach_args *ia = aux;
139
140 sc->sc_dev = self;
141 sc->sc_i2c = ia->ia_tag;
142 sc->sc_addr = ia->ia_addr;
143
144 aprint_naive("\n");
145 aprint_normal(": CODEC/RTC\n");
146
147 iic_acquire_bus(sc->sc_i2c, 0);
148 ac100_write(sc, AC100_RTC_CTRL_REG, AC100_RTC_CTRL_12H_24H_MODE);
149 iic_release_bus(sc->sc_i2c, 0);
150
151 sc->sc_todr.todr_gettime_ymdhms = ac100_rtc_gettime;
152 sc->sc_todr.todr_settime_ymdhms = ac100_rtc_settime;
153 sc->sc_todr.cookie = sc;
154
155 #ifdef FDT
156 const int phandle = ia->ia_cookie;
157 const int rtc_phandle = of_find_firstchild_byname(phandle, "rtc");
158 if (rtc_phandle > 0)
159 fdtbus_todr_attach(self, rtc_phandle, &sc->sc_todr);
160 #else
161 todr_attach(&sc->sc_todr);
162 #endif
163 }
164
165 static int
ac100_read(struct ac100_softc * sc,uint8_t reg,uint16_t * val)166 ac100_read(struct ac100_softc *sc, uint8_t reg, uint16_t *val)
167 {
168 return iic_smbus_read_word(sc->sc_i2c, sc->sc_addr, reg, val, 0);
169 }
170
171 static int
ac100_write(struct ac100_softc * sc,uint8_t reg,uint16_t val)172 ac100_write(struct ac100_softc *sc, uint8_t reg, uint16_t val)
173 {
174 return iic_smbus_write_word(sc->sc_i2c, sc->sc_addr, reg, val, 0);
175 }
176
177 static int
ac100_rtc_gettime(todr_chip_handle_t tch,struct clock_ymdhms * dt)178 ac100_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
179 {
180 struct ac100_softc *sc = tch->cookie;
181 uint16_t sec, min, hou, wee, day, mon, yea;
182
183 iic_acquire_bus(sc->sc_i2c, 0);
184 ac100_read(sc, AC100_RTC_SEC_REG, &sec);
185 ac100_read(sc, AC100_RTC_MIN_REG, &min);
186 ac100_read(sc, AC100_RTC_HOU_REG, &hou);
187 ac100_read(sc, AC100_RTC_WEE_REG, &wee);
188 ac100_read(sc, AC100_RTC_DAY_REG, &day);
189 ac100_read(sc, AC100_RTC_MON_REG, &mon);
190 ac100_read(sc, AC100_RTC_YEA_REG, &yea);
191 iic_release_bus(sc->sc_i2c, 0);
192
193 dt->dt_year = POSIX_BASE_YEAR + bcdtobin(yea & 0xff);
194 dt->dt_mon = bcdtobin(mon & 0x1f);
195 dt->dt_day = bcdtobin(day & 0x3f);
196 dt->dt_wday = bcdtobin(wee & 0x7);
197 dt->dt_hour = bcdtobin(hou & 0x3f);
198 dt->dt_min = bcdtobin(min & 0x7f);
199 dt->dt_sec = bcdtobin(sec & 0x7f);
200
201 return 0;
202 }
203
204 static int
ac100_rtc_settime(todr_chip_handle_t tch,struct clock_ymdhms * dt)205 ac100_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
206 {
207 struct ac100_softc *sc = tch->cookie;
208
209 iic_acquire_bus(sc->sc_i2c, 0);
210 ac100_write(sc, AC100_RTC_SEC_REG, bintobcd(dt->dt_sec) & 0x7f);
211 ac100_write(sc, AC100_RTC_MIN_REG, bintobcd(dt->dt_min) & 0x7f);
212 ac100_write(sc, AC100_RTC_HOU_REG, bintobcd(dt->dt_hour) & 0x3f);
213 ac100_write(sc, AC100_RTC_WEE_REG, bintobcd(dt->dt_wday) & 0x7);
214 ac100_write(sc, AC100_RTC_DAY_REG, bintobcd(dt->dt_day) & 0x3f);
215 ac100_write(sc, AC100_RTC_MON_REG, bintobcd(dt->dt_mon) & 0x1f);
216 ac100_write(sc, AC100_RTC_YEA_REG,
217 bintobcd(dt->dt_year - POSIX_BASE_YEAR) & 0xff);
218 ac100_write(sc, AC100_RTC_UPD_TRIG_REG, AC100_RTC_UPD_TRIG_WRITE);
219 iic_release_bus(sc->sc_i2c, 0);
220
221 return 0;
222 }
223