xref: /netbsd-src/sys/arch/x86/pci/amdsmn.c (revision ea402bb65ef70807d534b78fbbffe39fa4b36007)
1 /*	$NetBSD: amdsmn.c,v 1.18 2024/10/17 14:02:40 msaitoh Exp $	*/
2 
3 /*-
4  * Copyright (c) 2017, 2019 Conrad Meyer <cem@FreeBSD.org>
5  * All rights reserved.
6  *
7  * NetBSD port by Ian Clark <mrrooster@gmail.com>
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
22  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
27  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.18 2024/10/17 14:02:40 msaitoh Exp $ ");
33 
34 /*
35  * Driver for the AMD Family 15h (model 60+) and 17h CPU
36  * System Management Network.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/device.h>
41 #include <sys/errno.h>
42 #include <sys/mutex.h>
43 #include <sys/systm.h>
44 #include <sys/cpu.h>
45 #include <sys/module.h>
46 
47 #include <machine/specialreg.h>
48 
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pcidevs.h>
52 
53 #include "amdsmn.h"
54 #include "ioconf.h"
55 
56 #define	F15H_SMN_ADDR_REG	0xb8
57 #define	F15H_SMN_DATA_REG	0xbc
58 #define	F17H_SMN_ADDR_REG	0x60
59 #define	F17H_SMN_DATA_REG	0x64
60 
61 struct amdsmn_softc {
62 	kmutex_t smn_lock;
63 	uint8_t smn_addr_reg;
64 	uint8_t smn_data_reg;
65 	struct pci_attach_args pa;
66 	pci_chipset_tag_t pc;
67 	pcitag_t pcitag;
68 };
69 
70 static const struct pciid {
71 	uint16_t	amdsmn_deviceid;
72 	uint8_t		amdsmn_addr_reg;
73 	uint8_t		amdsmn_data_reg;
74 } amdsmn_ids[] = {
75 	{
76 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F15_6X_RC,
77 		.amdsmn_addr_reg = F15H_SMN_ADDR_REG,
78 		.amdsmn_data_reg = F15H_SMN_DATA_REG,
79 	},
80 	{
81 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_RC,
82 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
83 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
84 	},
85 	{
86 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_1X_RC,
87 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
88 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
89 	},
90 	{
91 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_6X_RC,
92 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
93 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
94 	},
95 	{
96 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC, /* or F19_0X */
97 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
98 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
99 	},
100 	{
101 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_AX_RC, /* or F19_4X */
102 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
103 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
104 	},
105 	{
106 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_1X_RC,
107 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
108 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
109 	},
110 	{
111 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_6X_RC,
112 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
113 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
114 	},
115 	{
116 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F19_7X_RC,
117 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
118 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
119 	},
120 	{
121 		.amdsmn_deviceid = PCI_PRODUCT_AMD_F1A_0X_RC,
122 		.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
123 		.amdsmn_data_reg = F17H_SMN_DATA_REG,
124 	},
125 };
126 
127 static int amdsmn_match(device_t, cfdata_t, void *);
128 static void amdsmn_attach(device_t, device_t, void *);
129 static int amdsmn_rescan(device_t, const char *, const int *);
130 static int amdsmn_detach(device_t, int);
131 static int amdsmn_misc_search(device_t, cfdata_t, const int *, void *);
132 
133 CFATTACH_DECL3_NEW(amdsmn, sizeof(struct amdsmn_softc), amdsmn_match,
134     amdsmn_attach, amdsmn_detach, NULL, amdsmn_rescan, NULL, 0);
135 
136 static int
137 amdsmn_match(device_t parent, cfdata_t match, void *aux)
138 {
139 	struct pci_attach_args *pa = aux;
140 	size_t i;
141 
142 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD)
143 		return 0;
144 
145 	for (i = 0; i < __arraycount(amdsmn_ids); i++)
146 		if (PCI_PRODUCT(pa->pa_id) == amdsmn_ids[i].amdsmn_deviceid)
147 			return 2;
148 
149 	return 0;
150 }
151 
152 static int
153 amdsmn_misc_search(device_t parent, cfdata_t cf, const int *locs, void *aux)
154 {
155 	if (config_probe(parent, cf, aux))
156 		config_attach(parent, cf, aux, NULL,
157 		    CFARGS(.locators = locs));
158 
159 	return 0;
160 }
161 
162 static void
163 amdsmn_attach(device_t parent, device_t self, void *aux)
164 {
165 	struct amdsmn_softc *sc = device_private(self);
166 	struct pci_attach_args *pa = aux;
167 	size_t i;
168 
169 	mutex_init(&sc->smn_lock, MUTEX_DEFAULT, IPL_NONE);
170 	sc->pa = *pa;
171 	sc->pc = pa->pa_pc;
172 	sc->pcitag = pa->pa_tag;
173 
174 	for (i = 0; i < __arraycount(amdsmn_ids); i++)
175 		if (PCI_PRODUCT(pa->pa_id) == amdsmn_ids[i].amdsmn_deviceid) {
176 			sc->smn_addr_reg = amdsmn_ids[i].amdsmn_addr_reg;
177 			sc->smn_data_reg = amdsmn_ids[i].amdsmn_data_reg;
178 		}
179 
180 	// aprint_normal(": AMD Family 17h System Management Network\n");
181 	aprint_normal(": AMD System Management Network\n");
182 
183 	pmf_device_register(self, NULL, NULL);
184 	amdsmn_rescan(self, NULL, NULL);
185 }
186 
187 static int
188 amdsmn_rescan(device_t self, const char *ifattr, const int *locators)
189 {
190 	struct amdsmn_softc *sc = device_private(self);
191 
192 	config_search(self, &sc->pa,
193 	    CFARGS(.search = amdsmn_misc_search));
194 
195 	return 0;
196 }
197 
198 static int
199 amdsmn_detach(device_t self, int flags)
200 {
201 	struct amdsmn_softc *sc = device_private(self);
202 
203 	pmf_device_deregister(self);
204 
205 	mutex_destroy(&sc->smn_lock);
206 	aprint_normal_dev(self,"detach!\n");
207 
208 	return 0;
209 }
210 
211 int
212 amdsmn_read(device_t dev, uint32_t addr, uint32_t *value)
213 {
214 	struct amdsmn_softc *sc = device_private(dev);
215 
216 	mutex_enter(&sc->smn_lock);
217 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_addr_reg, addr);
218 	*value = pci_conf_read(sc->pc, sc->pcitag, sc->smn_data_reg);
219 	mutex_exit(&sc->smn_lock);
220 
221 	return 0;
222 }
223 
224 int
225 amdsmn_write(device_t dev, uint32_t addr, uint32_t value)
226 {
227 	struct amdsmn_softc *sc = device_private(dev);
228 
229 	mutex_enter(&sc->smn_lock);
230 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_addr_reg, addr);
231 	pci_conf_write(sc->pc, sc->pcitag, sc->smn_data_reg, value);
232 	mutex_exit(&sc->smn_lock);
233 
234 	return 0;
235 }
236 
237 MODULE(MODULE_CLASS_DRIVER, amdsmn, "pci");
238 
239 #ifdef _MODULE
240 #include "ioconf.c"
241 #endif
242 
243 static int
244 amdsmn_modcmd(modcmd_t cmd, void *opaque)
245 {
246 	int error = 0;
247 
248 #ifdef _MODULE
249 	switch (cmd) {
250 	case MODULE_CMD_INIT:
251 		error = config_init_component(cfdriver_ioconf_amdsmn,
252 		    cfattach_ioconf_amdsmn, cfdata_ioconf_amdsmn);
253 		break;
254 	case MODULE_CMD_FINI:
255 		error = config_fini_component(cfdriver_ioconf_amdsmn,
256 		    cfattach_ioconf_amdsmn, cfdata_ioconf_amdsmn);
257 		break;
258 	default:
259 		error = ENOTTY;
260 		break;
261 	}
262 #endif
263 
264 	return error;
265 }
266 
267