1 /* $NetBSD: uvax.h,v 1.9 2023/08/10 19:13:52 andvar Exp $ */ 2 /* 3 * Copyright (c) 2002 Hugh Graham. 4 * Copyright (c) 1996 Ludd, University of Lule}, Sweden. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Ludd by Bertram Barth. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _VAX_UVAX_H_ 33 #define _VAX_UVAX_H_ 34 35 /* 36 * Generic definitions common on all MicroVAXen clock chip. 37 */ 38 #define uVAX_CLKVRT 0200 39 #define uVAX_CLKUIP 0200 40 #define uVAX_CLKRATE 040 41 #define uVAX_CLKENABLE 06 42 #define uVAX_CLKSET 0206 43 44 /* cpmbx bits */ 45 #define uVAX_CLKHLTACT 03 46 47 /* halt action values */ 48 #define uVAX_CLKRESTRT 01 49 #define uVAX_CLKREBOOT 02 50 #define uVAX_CLKHALT 03 51 52 /* in progress flags */ 53 #define uVAX_CLKBOOT 04 54 #define uVAX_CLKRSTRT 010 55 #define uVAX_CLKLANG 0360 56 57 /* 58 * Miscellaneous registers common on most VAXstations. 59 */ 60 struct vs_cpu { 61 u_long vc_hltcod; /* 00 - Halt Code Register */ 62 u_long vc_410mser; /* 04 - VS2K */ 63 u_long vc_410cear; /* 08 - VS2K */ 64 u_char vc_intmsk; /* 0c - Interrupt mask register */ 65 u_char vc_vdcorg; /* 0d - Mono display origin */ 66 u_char vc_vdcsel; /* 0e - Video interrupt select */ 67 u_char vc_intreq; /* 0f - Interrupt request register */ 68 #define vc_intclr vc_intreq 69 u_short vc_diagdsp; /* 10 - Diagnostic display register */ 70 u_short pad4; /* 12 */ 71 u_long vc_parctl; /* 14 - Parity Control Register */ 72 #define vc_bwf0 vc_parctl 73 u_short pad5; /* 16 */ 74 u_short pad6; /* 18 */ 75 u_short vc_diagtimu; /* 1a - usecond timer KA46 */ 76 u_short vc_diagtme; /* 1c - Diagnostic time register */ 77 #define vc_diagtimm vc_diagtme /* msecond time KA46 */ 78 }; 79 #define PARCTL_DMA 0x1000000 80 #define PARCTL_CPEN 2 81 #define PARCTL_DPEN 1 82 83 84 /* 85 * Console Mailbox layout common to several models. 86 */ 87 88 struct cpmbx { 89 unsigned int mbox_halt:2; /* mailbox halt action */ 90 unsigned int mbox_bip:1; /* bootstrap in progress */ 91 unsigned int mbox_rip:1; /* restart in progress */ 92 unsigned int mbox_lang:4; /* language info */ 93 unsigned int terminal:8; /* terminal info */ 94 unsigned int keyboard:8; /* keyboard info */ 95 unsigned int user_four:4; /* unknown */ 96 unsigned int user_halt:3; /* user halt action */ 97 unsigned int user_one:1; /* unknown */ 98 }; 99 100 extern struct cpmbx *cpmbx; 101 102 void generic_halt(void); 103 void generic_reboot(int); 104 105 #define MHALT_RESTART_REBOOT 0 106 #define MHALT_RESTART 1 107 #define MHALT_REBOOT 2 108 #define MHALT_HALT 3 109 110 #define UHALT_DEFAULT 0 111 #define UHALT_RESTART 1 112 #define UHALT_REBOOT 2 113 #define UHALT_HALT 3 114 #define UHALT_RESTART_REBOOT 4 115 116 #endif 117