xref: /netbsd-src/sys/arch/sparc64/include/intr.h (revision 19bd2f7501efb5091ec87def228b32a4ada4bfc4)
1 /*	$NetBSD: intr.h,v 1.32 2023/09/02 05:51:57 jdc Exp $ */
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Paul Kranenburg.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _SPARC64_INTR_H_
33 #define _SPARC64_INTR_H_
34 
35 #ifdef _KERNEL
36 
37 #if defined(_KERNEL_OPT)
38 #include "opt_multiprocessor.h"
39 #endif
40 
41 #ifndef _LOCORE
42 #include <machine/cpuset.h>
43 #endif
44 #include <machine/psl.h>
45 
46 /* XXX - arbitrary numbers; no interpretation is defined yet */
47 #define	IPL_NONE	0		/* nothing */
48 #define	IPL_SOFTCLOCK	1		/* timeouts */
49 #define	IPL_SOFTBIO	1		/* block I/O */
50 #define	IPL_SOFTNET	1		/* protocol stack */
51 #define	IPL_SOFTSERIAL	4		/* serial */
52 #define	IPL_VM		PIL_VM		/* memory allocation */
53 #define	IPL_SCHED	PIL_SCHED	/* scheduler */
54 #define	IPL_HIGH	PIL_HIGH	/* everything */
55 #define	IPL_HALT	5		/* cpu stop-self */
56 #define	IPL_PAUSE	13		/* pause cpu */
57 
58 /*
59  * IPL_SAFEPRI is a safe priority for sleep to set for a spin-wait
60  * during autoconfiguration or after a panic.
61  */
62 #define	IPL_SAFEPRI	IPL_NONE
63 
64 #ifndef _LOCORE
65 void fpusave_lwp(struct lwp *, bool);
66 #endif	/* _LOCORE */
67 
68 #if defined(MULTIPROCESSOR)
69 #ifndef _LOCORE
70 void	sparc64_ipi_init (void);
71 void	sparc64_ipi_halt_thiscpu (void *, void *);
72 void	sparc64_ipi_pause_thiscpu (void *);
73 void	sparc64_do_pause(void);
74 void	sparc64_ipi_drop_fpstate (void *, void *);
75 void	sparc64_ipi_save_fpstate (void *, void *);
76 void	sparc64_ipi_nop (void *, void *);
77 void	sparc64_ipi_ccall(void *, void *);
78 void	mp_halt_cpus (void);
79 void	mp_pause_cpus (void);
80 void	mp_resume_cpus (void);
81 int	mp_cpu_is_paused (sparc64_cpuset_t);
82 void	mp_resume_cpu(int);
83 #endif	/* _LOCORE */
84 #endif
85 
86 #endif /* _KERNEL */
87 
88 #define IPI_EVCNT_TLB_PTE	0
89 #define IPI_EVCNT_FPU_SYNCH	1
90 #define IPI_EVCNT_FPU_FLUSH	2
91 #define IPI_EVCNT_NUM		3
92 #define IPI_EVCNT_NAMES { "TLB pte IPI", "FPU synch IPI", "FPU flush IPI" }
93 
94 #endif /* _SPARC64_INTR_H_ */
95