1 /* $NetBSD: gio.c,v 1.38 2021/08/07 16:19:04 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2000 Soren S. Jorvang
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed for the
18 * NetBSD Project. See http://www.NetBSD.org/ for
19 * information about NetBSD.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: gio.c,v 1.38 2021/08/07 16:19:04 thorpej Exp $");
37
38 #include "opt_ddb.h"
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43
44 #include <sys/bus.h>
45 #include <machine/machtype.h>
46 #include <machine/sysconf.h>
47
48 #include <sgimips/gio/gioreg.h>
49 #include <sgimips/gio/giovar.h>
50 #include <sgimips/gio/giodevs_data.h>
51
52 #include "locators.h"
53 #include "newport.h"
54 #include "grtwo.h"
55 #include "light.h"
56 #include "imc.h"
57 #include "pic.h"
58
59 #if (NNEWPORT > 0)
60 #include <sgimips/gio/newportvar.h>
61 #endif
62
63 #if (NGRTWO > 0)
64 #include <sgimips/gio/grtwovar.h>
65 #endif
66
67 #if (NLIGHT > 0)
68 #include <sgimips/gio/lightvar.h>
69 #endif
70
71 #if (NIMC > 0)
72 extern int imc_gio64_arb_config(int, uint32_t);
73 #endif
74
75 #if (NPIC > 0)
76 extern int pic_gio32_arb_config(int, uint32_t);
77 #endif
78
79
80 static int gio_match(device_t, cfdata_t, void *);
81 static void gio_attach(device_t, device_t, void *);
82 static int gio_print(void *, const char *);
83 static int gio_search(device_t, cfdata_t, const int *, void *);
84 static int gio_submatch(device_t, cfdata_t, const int *, void *);
85
86 CFATTACH_DECL_NEW(gio, 0,
87 gio_match, gio_attach, NULL, NULL);
88
89 struct gio_probe {
90 uint32_t slot;
91 uint32_t base;
92 uint32_t mach_type;
93 uint32_t mach_subtype;
94 };
95
96 /*
97 * Expansion Slot Base Addresses
98 *
99 * IP12, IP20 and IP24 have two GIO connectors: GIO_SLOT_EXP0 and
100 * GIO_SLOT_EXP1.
101 *
102 * On IP24 these slots exist on the graphics board or the IOPLUS
103 * "mezzanine" on Indy and Challenge S, respectively. The IOPLUS or
104 * graphics board connects to the mainboard via a single GIO64 connector.
105 *
106 * IP22 has either three or four physical connectors, but only two
107 * electrically distinct slots: GIO_SLOT_GFX and GIO_SLOT_EXP0.
108 *
109 * It should also be noted that DMA is (mostly) not supported in Challenge
110 * S's GIO_SLOT_EXP1. See gio(4) for the story.
111 */
112 static const struct gio_probe slot_bases[] = {
113 { GIO_SLOT_GFX, 0x1f000000, MACH_SGI_IP22, MACH_SGI_IP22_FULLHOUSE },
114
115 { GIO_SLOT_EXP0, 0x1f400000, MACH_SGI_IP12, -1 },
116 { GIO_SLOT_EXP0, 0x1f400000, MACH_SGI_IP20, -1 },
117 { GIO_SLOT_EXP0, 0x1f400000, MACH_SGI_IP22, -1 },
118
119 { GIO_SLOT_EXP1, 0x1f600000, MACH_SGI_IP12, -1 },
120 { GIO_SLOT_EXP1, 0x1f600000, MACH_SGI_IP20, -1 },
121 { GIO_SLOT_EXP1, 0x1f600000, MACH_SGI_IP22, MACH_SGI_IP22_GUINNESS },
122
123 { 0, 0, 0, 0 }
124 };
125
126 /*
127 * Graphic Board Base Addresses
128 *
129 * Graphics boards are not treated like expansion slot cards. Their base
130 * addresses do not necessarily correspond to GIO slot addresses and they
131 * do not contain product identification words.
132 */
133 static const struct gio_probe gfx_bases[] = {
134 /* grtwo, and newport on IP22 */
135 { -1, 0x1f000000, MACH_SGI_IP12, -1 },
136 { -1, 0x1f000000, MACH_SGI_IP20, -1 },
137 { -1, 0x1f000000, MACH_SGI_IP22, -1 },
138
139 /* light */
140 { -1, 0x1f3f0000, MACH_SGI_IP12, -1 },
141 { -1, 0x1f3f0000, MACH_SGI_IP20, -1 },
142
143 /* light (dual headed) */
144 { -1, 0x1f3f8000, MACH_SGI_IP12, -1 },
145 { -1, 0x1f3f8000, MACH_SGI_IP20, -1 },
146
147 /* grtwo, and newport on IP22 */
148 { -1, 0x1f400000, MACH_SGI_IP12, -1 },
149 { -1, 0x1f400000, MACH_SGI_IP20, -1 },
150 { -1, 0x1f400000, MACH_SGI_IP22, -1 },
151
152 /* grtwo */
153 { -1, 0x1f600000, MACH_SGI_IP12, -1 },
154 { -1, 0x1f600000, MACH_SGI_IP20, -1 },
155 { -1, 0x1f600000, MACH_SGI_IP22, -1 },
156
157 /* newport */
158 { -1, 0x1f800000, MACH_SGI_IP22, MACH_SGI_IP22_FULLHOUSE },
159
160 /* newport */
161 { -1, 0x1fc00000, MACH_SGI_IP22, MACH_SGI_IP22_FULLHOUSE },
162
163 { 0, 0, 0, 0 }
164 };
165
166 /* maximum number of graphics boards possible (arbitrarily large estimate) */
167 #define MAXGFX 8
168
169 static int
gio_match(device_t parent,cfdata_t match,void * aux)170 gio_match(device_t parent, cfdata_t match, void *aux)
171 {
172 if (mach_type == MACH_SGI_IP12 || mach_type == MACH_SGI_IP20 ||
173 mach_type == MACH_SGI_IP22)
174 return 1;
175
176 return 0;
177 }
178
179 static void
gio_attach(device_t parent,device_t self,void * aux)180 gio_attach(device_t parent, device_t self, void *aux)
181 {
182 struct gio_attach_args ga;
183 uint32_t gfx[MAXGFX];
184 int i, j, ngfx;
185
186 printf("\n");
187
188 ngfx = 0;
189 memset(gfx, 0, sizeof(gfx));
190
191 /*
192 * Attach graphics devices first. They do not contain a Product
193 * Identification Word and have no slot number.
194 *
195 * Record addresses to which graphics devices attach so that
196 * we do not confuse them with expansion slots, should the
197 * addresses coincide.
198 */
199 for (i = 0; gfx_bases[i].base != 0; i++) {
200 /* skip slots that don't apply to us */
201 if (gfx_bases[i].mach_type != mach_type)
202 continue;
203
204 if (gfx_bases[i].mach_subtype != -1 &&
205 gfx_bases[i].mach_subtype != mach_subtype)
206 continue;
207
208 ga.ga_slot = -1;
209 ga.ga_addr = gfx_bases[i].base;
210 /* XXX */
211 if (platform.badaddr((void *)MIPS_PHYS_TO_KSEG1(ga.ga_addr),
212 sizeof(uint32_t)))
213 continue;
214 ga.ga_iot = normal_memt;
215 if (bus_space_map(normal_memt, ga.ga_addr, 0,
216 BUS_SPACE_MAP_LINEAR, &ga.ga_ioh) != 0)
217 continue;
218 ga.ga_dmat = &sgimips_default_bus_dma_tag;
219 ga.ga_product = -1;
220
221
222 if (config_found(self, &ga, gio_print,
223 CFARGS(.submatch = gio_submatch)) != NULL) {
224 if (ngfx == MAXGFX)
225 panic("gio_attach: MAXGFX");
226 gfx[ngfx++] = gfx_bases[i].base;
227 }
228 }
229
230 /*
231 * Now attach any GIO expansion cards.
232 *
233 * Be sure to skip any addresses to which a graphics device has
234 * already been attached.
235 */
236 for (i = 0; slot_bases[i].base != 0; i++) {
237 bool skip = false;
238
239 /* skip slots that don't apply to us */
240 if (slot_bases[i].mach_type != mach_type)
241 continue;
242
243 if (slot_bases[i].mach_subtype != -1 &&
244 slot_bases[i].mach_subtype != mach_subtype)
245 continue;
246
247 for (j = 0; j < ngfx; j++) {
248 if (slot_bases[i].base == gfx[j]) {
249 skip = true;
250 break;
251 }
252 }
253 if (skip)
254 continue;
255
256 ga.ga_slot = slot_bases[i].slot;
257 ga.ga_addr = slot_bases[i].base;
258 /* XXX */
259 if (platform.badaddr((void *)MIPS_PHYS_TO_KSEG1(ga.ga_addr),
260 sizeof(uint32_t)))
261 continue;
262 ga.ga_iot = normal_memt;
263 if (bus_space_map(normal_memt, ga.ga_addr, 0,
264 BUS_SPACE_MAP_LINEAR, &ga.ga_ioh) != 0)
265 continue;
266 ga.ga_dmat = &sgimips_default_bus_dma_tag;
267
268 ga.ga_product = bus_space_read_4(ga.ga_iot, ga.ga_ioh, 0);
269
270 config_found(self, &ga, gio_print,
271 CFARGS(.submatch = gio_submatch));
272 }
273
274 config_search(self, &ga,
275 CFARGS(.search = gio_search));
276 }
277
278 static int
gio_print(void * aux,const char * pnp)279 gio_print(void *aux, const char *pnp)
280 {
281 struct gio_attach_args *ga = aux;
282 int i = 0;
283
284 /* gfx probe */
285 if (ga->ga_product == -1)
286 return (QUIET);
287
288 if (pnp != NULL) {
289 int product, revision;
290
291 product = GIO_PRODUCT_PRODUCTID(ga->ga_product);
292
293 if (GIO_PRODUCT_32BIT_ID(ga->ga_product))
294 revision = GIO_PRODUCT_REVISION(ga->ga_product);
295 else
296 revision = 0;
297
298 while (gio_knowndevs[i].productid != 0) {
299 if (gio_knowndevs[i].productid == product) {
300 aprint_normal("%s", gio_knowndevs[i].product);
301 break;
302 }
303 i++;
304 }
305
306 if (gio_knowndevs[i].productid == 0)
307 aprint_normal("unknown GIO card");
308
309 aprint_normal(" (product 0x%02x revision 0x%02x) at %s",
310 product, revision, pnp);
311 }
312
313 if (ga->ga_slot != GIOCF_SLOT_DEFAULT)
314 aprint_normal(" slot %d", ga->ga_slot);
315 if (ga->ga_addr != (uint32_t) GIOCF_ADDR_DEFAULT)
316 aprint_normal(" addr 0x%x", ga->ga_addr);
317
318 return UNCONF;
319 }
320
321 static int
gio_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)322 gio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
323 {
324 struct gio_attach_args *ga = aux;
325
326 do {
327 /* Handled by direct configuration, so skip here */
328 if (cf->cf_loc[GIOCF_ADDR] == GIOCF_ADDR_DEFAULT)
329 return 0;
330
331 ga->ga_slot = cf->cf_loc[GIOCF_SLOT];
332 ga->ga_addr = cf->cf_loc[GIOCF_ADDR];
333 ga->ga_iot = normal_memt;
334 ga->ga_ioh = MIPS_PHYS_TO_KSEG1(ga->ga_addr);
335
336 if (config_probe(parent, cf, ga))
337 config_attach(parent, cf, ga, gio_print, CFARGS_NONE);
338 } while (cf->cf_fstate == FSTATE_STAR);
339
340 return 0;
341 }
342
343 static int
gio_submatch(device_t parent,cfdata_t cf,const int * ldesc,void * aux)344 gio_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
345 {
346 struct gio_attach_args *ga = aux;
347
348 if (cf->cf_loc[GIOCF_SLOT] != GIOCF_SLOT_DEFAULT &&
349 cf->cf_loc[GIOCF_SLOT] != ga->ga_slot)
350 return 0;
351
352 if (cf->cf_loc[GIOCF_ADDR] != GIOCF_ADDR_DEFAULT &&
353 cf->cf_loc[GIOCF_ADDR] != ga->ga_addr)
354 return 0;
355
356 return config_match(parent, cf, aux);
357 }
358
359 int
gio_cnattach(void)360 gio_cnattach(void)
361 {
362 struct gio_attach_args ga;
363 int i;
364
365 for (i = 0; gfx_bases[i].base != 0; i++) {
366 /* skip bases that don't apply to us */
367 if (gfx_bases[i].mach_type != mach_type)
368 continue;
369
370 if (gfx_bases[i].mach_subtype != -1 &&
371 gfx_bases[i].mach_subtype != mach_subtype)
372 continue;
373
374 ga.ga_slot = -1;
375 ga.ga_addr = gfx_bases[i].base;
376 /* XXX */
377 if (platform.badaddr((void *)MIPS_PHYS_TO_KSEG1(ga.ga_addr),
378 sizeof(uint32_t)))
379 continue;
380 ga.ga_iot = normal_memt;
381 if (bus_space_map(normal_memt, ga.ga_addr, 0,
382 BUS_SPACE_MAP_LINEAR, &ga.ga_ioh) != 0)
383 continue;
384 ga.ga_dmat = &sgimips_default_bus_dma_tag;
385 ga.ga_product = -1;
386
387 #if (NGRTWO > 0)
388 if (grtwo_cnattach(&ga) == 0)
389 return 0;
390 #endif
391
392 #if (NLIGHT > 0)
393 if (light_cnattach(&ga) == 0)
394 return 0;
395 #endif
396
397 #if (NNEWPORT > 0)
398 if (newport_cnattach(&ga) == 0)
399 return 0;
400 #endif
401
402 }
403
404 return ENXIO;
405 }
406
407 /*
408 * Devices living in the expansion slots must enable or disable some
409 * GIO arbiter settings. This is accomplished via imc(4) or pic(4)
410 * registers, depending on the machine in question.
411 */
412 int
gio_arb_config(int slot,uint32_t flags)413 gio_arb_config(int slot, uint32_t flags)
414 {
415
416 if (flags == 0)
417 return (EINVAL);
418
419 if (flags & ~(GIO_ARB_RT | GIO_ARB_LB | GIO_ARB_MST | GIO_ARB_SLV |
420 GIO_ARB_PIPE | GIO_ARB_NOPIPE | GIO_ARB_32BIT | GIO_ARB_64BIT |
421 GIO_ARB_HPC2_32BIT | GIO_ARB_HPC2_64BIT))
422 return (EINVAL);
423
424 if (((flags & GIO_ARB_RT) && (flags & GIO_ARB_LB)) ||
425 ((flags & GIO_ARB_MST) && (flags & GIO_ARB_SLV)) ||
426 ((flags & GIO_ARB_PIPE) && (flags & GIO_ARB_NOPIPE)) ||
427 ((flags & GIO_ARB_32BIT) && (flags & GIO_ARB_64BIT)) ||
428 ((flags & GIO_ARB_HPC2_32BIT) && (flags & GIO_ARB_HPC2_64BIT)))
429 return (EINVAL);
430
431 #if (NPIC > 0)
432 if (mach_type == MACH_SGI_IP12)
433 return (pic_gio32_arb_config(slot, flags));
434 #endif
435
436 #if (NIMC > 0)
437 if (mach_type == MACH_SGI_IP20 || mach_type == MACH_SGI_IP22)
438 return (imc_gio64_arb_config(slot, flags));
439 #endif
440
441 return (EINVAL);
442 }
443
444 /*
445 * Establish an interrupt handler for the specified slot.
446 *
447 * Indy and Challenge S have an interrupt per GIO slot. Indigo and Indigo2
448 * share a single interrupt, however.
449 */
450 void *
gio_intr_establish(int slot,int level,int (* func)(void *),void * arg)451 gio_intr_establish(int slot, int level, int (*func)(void *), void *arg)
452 {
453 int intr;
454
455 switch (mach_type) {
456 case MACH_SGI_IP12:
457 case MACH_SGI_IP20:
458 if (slot == GIO_SLOT_GFX)
459 panic("gio_intr_establish: slot %d", slot);
460 intr = 6;
461 break;
462
463 case MACH_SGI_IP22:
464 if (mach_subtype == MACH_SGI_IP22_FULLHOUSE) {
465 if (slot == GIO_SLOT_EXP1)
466 panic("gio_intr_establish: slot %d", slot);
467 intr = 6;
468 } else {
469 if (slot == GIO_SLOT_GFX)
470 panic("gio_intr_establish: slot %d", slot);
471 intr = (slot == GIO_SLOT_EXP0) ? 22 : 23;
472 }
473 break;
474
475 default:
476 panic("gio_intr_establish: mach_type");
477 }
478
479 return (cpu_intr_establish(intr, level, func, arg));
480 }
481
482 const char *
gio_product_string(int prid)483 gio_product_string(int prid)
484 {
485 int i;
486
487 for (i = 0; gio_knowndevs[i].product != NULL; i++)
488 if (gio_knowndevs[i].productid == prid)
489 return (gio_knowndevs[i].product);
490
491 return (NULL);
492 }
493