xref: /netbsd-src/sys/arch/sgimips/dev/ctl.c (revision eb488f671d3f62b03268182548a1bfc622ffc37b)
1 /*	$NetBSD: ctl.c,v 1.4 2015/02/18 16:47:58 macallan Exp $	 */
2 
3 /*
4  * Copyright (c) 2009 Stephen M. Rumble
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: ctl.c,v 1.4 2015/02/18 16:47:58 macallan Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/kernel.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
37 #include <sys/callout.h>
38 
39 #include <machine/cpu.h>
40 #include <machine/locore.h>
41 #include <machine/autoconf.h>
42 #include <sys/bus.h>
43 #include <machine/machtype.h>
44 #include <machine/sysconf.h>
45 
46 #include <sgimips/dev/ctlreg.h>
47 
48 struct ctl_softc {
49 	device_t	   	sc_dev;
50 
51 	bus_space_tag_t		iot;
52 	bus_space_handle_t	ioh;
53 };
54 
55 static int      ctl_match(device_t, cfdata_t, void *);
56 static void     ctl_attach(device_t, device_t, void *);
57 static void	ctl_bus_reset(void);
58 static void	ctl_bus_error(vaddr_t, uint32_t, uint32_t);
59 static void	ctl_watchdog_enable(void);
60 static void	ctl_watchdog_disable(void);
61 static void	ctl_watchdog_tickle(void);
62 
63 #if defined(BLINK)
64 static callout_t ctl_blink_ch;
65 static void	ctl_blink(void *);
66 #endif
67 
68 CFATTACH_DECL_NEW(ctl, sizeof(struct ctl_softc),
69     ctl_match, ctl_attach, NULL, NULL);
70 
71 static struct ctl_softc *csc;
72 
73 static int
ctl_match(device_t parent,cfdata_t match,void * aux)74 ctl_match(device_t parent, cfdata_t match, void *aux)
75 {
76 	if (csc != NULL)
77 		return 0;
78 
79 	/*
80 	 * CTL exists on IP6/IP10 systems.
81 	 */
82 	if (mach_type == MACH_SGI_IP6 || mach_type == MACH_SGI_IP10)
83 		return 1;
84 	else
85 		return 0;
86 }
87 
88 static void
ctl_attach(device_t parent,device_t self,void * aux)89 ctl_attach(device_t parent, device_t self, void *aux)
90 {
91 	struct mainbus_attach_args *ma = aux;
92 	struct ctl_softc * const sc = device_private(self);
93 
94 #ifdef BLINK
95 	callout_init(&ctl_blink_ch, 0);
96 #endif
97 
98 	sc->sc_dev = self;
99 	csc = sc;
100 
101 	sc->iot = normal_memt;
102 	if (bus_space_map(sc->iot, ma->ma_addr, 0x10000 /* XXX */,
103 	    BUS_SPACE_MAP_LINEAR, &sc->ioh))
104 		panic("ctl_attach: could not allocate memory\n");
105 
106 	platform.bus_reset = ctl_bus_reset;
107 	platform.intr5 = ctl_bus_error;
108 	platform.watchdog_enable = ctl_watchdog_enable;
109 	platform.watchdog_disable = ctl_watchdog_disable;
110 	platform.watchdog_reset = ctl_watchdog_tickle;
111 
112 	bus_space_write_2(sc->iot, sc->ioh, CTL_CPUCTRL,
113 	    (CTL_CPUCTRL_PARITY | CTL_CPUCTRL_SLAVE));
114 
115 	printf("\n");
116 
117 	ctl_bus_reset();
118 
119 #if defined(BLINK)
120 	ctl_blink(sc);
121 #endif
122 }
123 
124 static void
ctl_bus_reset(void)125 ctl_bus_reset(void)
126 {
127 	struct ctl_softc * const sc = csc;
128 
129 	bus_space_read_1(sc->iot, sc->ioh, CTL_LAN_PAR_CLR);
130 	bus_space_read_1(sc->iot, sc->ioh, CTL_DMA_PAR_CLR);
131 	bus_space_read_1(sc->iot, sc->ioh, CTL_CPU_PAR_CLR);
132 	bus_space_read_1(sc->iot, sc->ioh, CTL_VME_PAR_CLR);
133 }
134 
135 static void
ctl_bus_error(vaddr_t pc,uint32_t status,uint32_t ipending)136 ctl_bus_error(vaddr_t pc, uint32_t status, uint32_t ipending)
137 {
138 
139 	printf("ctl0: bus error\n");
140 	ctl_bus_reset();
141 }
142 
143 static void
ctl_watchdog_enable(void)144 ctl_watchdog_enable(void)
145 {
146 	struct ctl_softc * const sc = csc;
147 	uint32_t reg;
148 
149 	/* XXX- doesn't seem to work properly */
150 	return;
151 
152 	reg = bus_space_read_2(sc->iot, sc->ioh, CTL_CPUCTRL);
153 	reg |= CTL_CPUCTRL_WDOG;
154 	bus_space_write_2(sc->iot, sc->ioh, CTL_CPUCTRL, reg);
155 }
156 
157 static void
ctl_watchdog_disable(void)158 ctl_watchdog_disable(void)
159 {
160 	struct ctl_softc * const sc = csc;
161 	uint16_t reg;
162 
163 	/* XXX- doesn't seem to work properly */
164 	return;
165 
166 	reg = bus_space_read_2(sc->iot, sc->ioh, CTL_CPUCTRL_WDOG);
167 	reg &= ~(CTL_CPUCTRL_WDOG);
168 	bus_space_write_2(sc->iot, sc->ioh, CTL_CPUCTRL, reg);
169 }
170 
171 static void
ctl_watchdog_tickle(void)172 ctl_watchdog_tickle(void)
173 {
174 
175 	ctl_watchdog_disable();
176 	ctl_watchdog_enable();
177 }
178 
179 #if defined(BLINK)
180 static void
ctl_blink(void * arg)181 ctl_blink(void *arg)
182 {
183 	struct ctl_softc *sc = arg;
184 	int s, value;
185 
186 	s = splhigh();
187 
188 	value = bus_space_read_1(sc->iot, sc->ioh, CTL_AUX_CPUCTRL);
189 	value ^= CTL_AUX_CPUCTRL_CONSLED;
190 	bus_space_write_1(sc->iot, sc->ioh, CTL_AUX_CPUCTRL, value);
191 	splx(s);
192 
193 	/*
194 	 * Blink rate is:
195 	 *      full cycle every second if completely idle (loadav = 0)
196 	 *      full cycle every 2 seconds if loadav = 1
197 	 *      full cycle every 3 seconds if loadav = 2
198 	 * etc.
199 	 */
200 	int ticks = ((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1);
201 	callout_reset(&ctl_blink_ch, ticks, ctl_blink, sc);
202 }
203 #endif
204