1 /* $NetBSD: fpu_compare.c,v 1.8 2022/09/08 15:22:43 rin Exp $ */
2
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * All advertising materials mentioning features or use of this software
12 * must display the following acknowledgement:
13 * This product includes software developed by the University of
14 * California, Lawrence Berkeley Laboratory.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93
41 */
42
43 /*
44 * FCMPU and FCMPO instructions.
45 *
46 * These rely on the fact that our internal wide format is achieved by
47 * adding zero bits to the end of narrower mantissas.
48 */
49
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.8 2022/09/08 15:22:43 rin Exp $");
52
53 #include <sys/types.h>
54
55 #include <machine/fpu.h>
56 #include <machine/reg.h>
57
58 #include <powerpc/fpu/fpu_arith.h>
59 #include <powerpc/fpu/fpu_emu.h>
60
61 /*
62 * Perform a compare instruction (with or without unordered exception).
63 * This updates the fcc field in the fsr.
64 *
65 * If either operand is NaN, the result is unordered. For ordered, this
66 * causes an NV exception. Everything else is ordered:
67 * |Inf| > |numbers| > |0|.
68 * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
69 * so we get this directly. Note, however, that two zeros compare equal
70 * regardless of sign, while everything else depends on sign.
71 *
72 * Incidentally, two Infs of the same sign compare equal (per the 80387
73 * manual---it would be nice if the SPARC documentation were more
74 * complete).
75 */
76 void
fpu_compare(struct fpemu * fe,int ordered)77 fpu_compare(struct fpemu *fe, int ordered)
78 {
79 struct fpn *a, *b, *r;
80 int cc;
81
82 fe->fe_fpscr &= ~FPSCR_FPCC;
83
84 a = &fe->fe_f1;
85 b = &fe->fe_f2;
86
87 if (ISNAN(a) || ISNAN(b)) {
88 /*
89 * In any case, we already got an exception for signalling
90 * NaNs; here we may replace that one with an identical
91 * exception, but so what?.
92 */
93 cc = FPSCR_FU;
94 if (ISSNAN(a) || ISSNAN(b))
95 cc |= FPSCR_VXSNAN;
96 if (ordered) {
97 #ifdef notyet /* XXXRO */
98 if ((fe->fe_fpscr & FPSCR_VE) == 0 ||
99 ISQNAN(a) || ISQNAN(b))
100 #endif
101 cc |= FPSCR_VXVC;
102 }
103 goto done;
104 }
105
106 /*
107 * Must handle both-zero early to avoid sign goofs. Otherwise,
108 * at most one is 0, and if the signs differ we are done.
109 */
110 if (ISZERO(a) && ISZERO(b)) {
111 cc = FPSCR_FE;
112 goto done;
113 }
114 if (a->fp_sign) { /* a < 0 (or -0) */
115 if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */
116 cc = FPSCR_FL;
117 goto done;
118 }
119 } else { /* a > 0 (or +0) */
120 if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */
121 cc = FPSCR_FG;
122 goto done;
123 }
124 }
125
126 /*
127 * Now the signs are the same (but may both be negative). All
128 * we have left are these cases:
129 *
130 * |a| < |b| [classes or values differ]
131 * |a| > |b| [classes or values differ]
132 * |a| == |b| [classes and values identical]
133 *
134 * We define `diff' here to expand these as:
135 *
136 * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT
137 * |a| < |b|, a,b < 0: a > b => FSR_CC_GT
138 * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT
139 * |a| > |b|, a,b < 0: a < b => FSR_CC_LT
140 */
141 #define opposite_cc(cc) ((cc) == FPSCR_FL ? FPSCR_FG : FPSCR_FL)
142 #define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude))
143 if (a->fp_class < b->fp_class) { /* |a| < |b| */
144 cc = diff(FPSCR_FL);
145 goto done;
146 }
147 if (a->fp_class > b->fp_class) { /* |a| > |b| */
148 cc = diff(FPSCR_FG);
149 goto done;
150 }
151 /* now none can be 0: only Inf and numbers remain */
152 if (ISINF(a)) { /* |Inf| = |Inf| */
153 cc = FPSCR_FE;
154 goto done;
155 }
156 r = fpu_sub(fe);
157 if (ISZERO(r))
158 cc = FPSCR_FE;
159 else if (r->fp_sign)
160 cc = FPSCR_FL;
161 else
162 cc = FPSCR_FG;
163 done:
164 fe->fe_cx = cc;
165 }
166