1 /* $NetBSD: if_xe.c,v 1.29 2024/07/05 04:31:49 rin Exp $ */
2 /*
3 * Copyright (c) 1998 Darrin B. Jewell
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: if_xe.c,v 1.29 2024/07/05 04:31:49 rin Exp $");
29
30 #include "opt_inet.h"
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/mbuf.h>
35 #include <sys/syslog.h>
36 #include <sys/socket.h>
37 #include <sys/device.h>
38 #include <sys/kmem.h>
39
40 #include <net/if.h>
41 #include <net/if_ether.h>
42 #include <net/if_media.h>
43
44 #ifdef INET
45 #include <netinet/in.h>
46 #include <netinet/if_inarp.h>
47 #endif
48
49 #include <machine/autoconf.h>
50 #include <machine/cpu.h>
51 #include <machine/intr.h>
52 #include <machine/bus.h>
53
54 #include <next68k/next68k/isr.h>
55
56 #include <next68k/dev/mb8795reg.h>
57 #include <next68k/dev/mb8795var.h>
58
59 #include <next68k/dev/bmapreg.h>
60 #include <next68k/dev/intiovar.h>
61 #include <next68k/dev/nextdmareg.h>
62 #include <next68k/dev/nextdmavar.h>
63
64 #include <next68k/dev/if_xevar.h>
65 #include <next68k/dev/if_xereg.h>
66
67 #ifdef DEBUG
68 #define XE_DEBUG
69 #endif
70
71 #ifdef XE_DEBUG
72 int xe_debug = 0;
73 #define DPRINTF(x) if (xe_debug) printf x;
74 #else
75 #define DPRINTF(x)
76 #endif
77 #define PRINTF(x) printf x;
78
79 extern int turbo;
80
81 int xe_match(device_t, cfdata_t, void *);
82 void xe_attach(device_t, device_t, void *);
83 int xe_tint(void *);
84 int xe_rint(void *);
85
86 struct mbuf *xe_dma_rxmap_load(struct mb8795_softc *, bus_dmamap_t);
87
88 bus_dmamap_t xe_dma_rx_continue(void *);
89 void xe_dma_rx_completed(bus_dmamap_t, void *);
90 bus_dmamap_t xe_dma_tx_continue(void *);
91 void xe_dma_tx_completed(bus_dmamap_t, void *);
92 void xe_dma_rx_shutdown(void *);
93 void xe_dma_tx_shutdown(void *);
94
95 static void findchannel_defer(device_t);
96
97 CFATTACH_DECL_NEW(xe, sizeof(struct xe_softc),
98 xe_match, xe_attach, NULL, NULL);
99
100 static int xe_dma_medias[] = {
101 IFM_ETHER | IFM_AUTO,
102 IFM_ETHER | IFM_10_T,
103 IFM_ETHER | IFM_10_2,
104 };
105 static int nxe_dma_medias = __arraycount(xe_dma_medias);
106
107 static int attached = 0;
108
109 /*
110 * Functions and the switch for the MI code.
111 */
112 u_char xe_read_reg(struct mb8795_softc *, int);
113 void xe_write_reg(struct mb8795_softc *, int, u_char);
114 void xe_dma_reset(struct mb8795_softc *);
115 void xe_dma_rx_setup(struct mb8795_softc *);
116 void xe_dma_rx_go(struct mb8795_softc *);
117 struct mbuf * xe_dma_rx_mbuf(struct mb8795_softc *);
118 void xe_dma_tx_setup(struct mb8795_softc *);
119 void xe_dma_tx_go(struct mb8795_softc *);
120 int xe_dma_tx_mbuf(struct mb8795_softc *, struct mbuf *);
121 int xe_dma_tx_isactive(struct mb8795_softc *);
122
123 struct mb8795_glue xe_glue = {
124 xe_read_reg,
125 xe_write_reg,
126 xe_dma_reset,
127 xe_dma_rx_setup,
128 xe_dma_rx_go,
129 xe_dma_rx_mbuf,
130 xe_dma_tx_setup,
131 xe_dma_tx_go,
132 xe_dma_tx_mbuf,
133 xe_dma_tx_isactive,
134 };
135
136 int
xe_match(device_t parent,cfdata_t match,void * aux)137 xe_match(device_t parent, cfdata_t match, void *aux)
138 {
139 struct intio_attach_args *ia = (struct intio_attach_args *)aux;
140
141 if (attached)
142 return 0;
143
144 ia->ia_addr = (void *)NEXT_P_ENET;
145
146 return 1;
147 }
148
149 static void
findchannel_defer(device_t self)150 findchannel_defer(device_t self)
151 {
152 struct xe_softc *xsc = device_private(self);
153 struct mb8795_softc *sc = &xsc->sc_mb8795;
154 int i, error;
155
156 if (!xsc->sc_txdma) {
157 xsc->sc_txdma = nextdma_findchannel ("enetx");
158 if (xsc->sc_txdma == NULL)
159 panic("%s: can't find enetx DMA channel",
160 device_xname(sc->sc_dev));
161 }
162 if (!xsc->sc_rxdma) {
163 xsc->sc_rxdma = nextdma_findchannel ("enetr");
164 if (xsc->sc_rxdma == NULL)
165 panic ("%s: can't find enetr DMA channel",
166 device_xname(sc->sc_dev));
167 }
168 aprint_normal_dev(sc->sc_dev, "using DMA channels %s %s\n",
169 device_xname(xsc->sc_txdma->sc_dev),
170 device_xname(xsc->sc_rxdma->sc_dev));
171
172 nextdma_setconf (xsc->sc_rxdma, continue_cb, xe_dma_rx_continue);
173 nextdma_setconf (xsc->sc_rxdma, completed_cb, xe_dma_rx_completed);
174 nextdma_setconf (xsc->sc_rxdma, shutdown_cb, xe_dma_rx_shutdown);
175 nextdma_setconf (xsc->sc_rxdma, cb_arg, sc);
176
177 nextdma_setconf (xsc->sc_txdma, continue_cb, xe_dma_tx_continue);
178 nextdma_setconf (xsc->sc_txdma, completed_cb, xe_dma_tx_completed);
179 nextdma_setconf (xsc->sc_txdma, shutdown_cb, xe_dma_tx_shutdown);
180 nextdma_setconf (xsc->sc_txdma, cb_arg, sc);
181
182 /* Initialize the DMA maps */
183 error = bus_dmamap_create(xsc->sc_txdma->sc_dmat, MCLBYTES,
184 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
185 &xsc->sc_tx_dmamap);
186 if (error) {
187 aprint_error_dev(sc->sc_dev,
188 "can't create tx DMA map, error = %d", error);
189 }
190
191 for(i = 0; i < MB8795_NRXBUFS; i++) {
192 error = bus_dmamap_create(xsc->sc_rxdma->sc_dmat, MCLBYTES,
193 (MCLBYTES/MSIZE), MCLBYTES, 0, BUS_DMA_ALLOCNOW,
194 &xsc->sc_rx_dmamap[i]);
195 if (error) {
196 panic("%s: can't create rx DMA map, error = %d",
197 device_xname(sc->sc_dev), error);
198 }
199 xsc->sc_rx_mb_head[i] = NULL;
200 }
201 xsc->sc_rx_loaded_idx = 0;
202 xsc->sc_rx_completed_idx = 0;
203 xsc->sc_rx_handled_idx = 0;
204
205 /*
206 * @@@ more next hacks
207 * the 2000 covers at least a 1500 mtu + headers
208 * + DMA_BEGINALIGNMENT+ DMA_ENDALIGNMENT
209 */
210 xsc->sc_txbuf = kmem_alloc(2000, KM_SLEEP);
211 xsc->sc_tx_mb_head = NULL;
212 xsc->sc_tx_loaded = 0;
213
214 mb8795_config(sc, xe_dma_medias, nxe_dma_medias, xe_dma_medias[0]);
215
216 isrlink_autovec(xe_tint, sc, NEXT_I_IPL(NEXT_I_ENETX), 1, NULL);
217 INTR_ENABLE(NEXT_I_ENETX);
218 isrlink_autovec(xe_rint, sc, NEXT_I_IPL(NEXT_I_ENETR), 1, NULL);
219 INTR_ENABLE(NEXT_I_ENETR);
220 }
221
222 void
xe_attach(device_t parent,device_t self,void * aux)223 xe_attach(device_t parent, device_t self, void *aux)
224 {
225 struct intio_attach_args *ia = (struct intio_attach_args *)aux;
226 struct xe_softc *xsc = device_private(self);
227 struct mb8795_softc *sc = &xsc->sc_mb8795;
228
229 sc->sc_dev = self;
230 DPRINTF(("%s: xe_attach()\n", device_xname(self)));
231
232 {
233 /* kludge from machdep.c:next68k_bootargs() */
234 extern u_char rom_enetaddr[6];
235 int i;
236
237 for (i = 0; i < 6; i++)
238 sc->sc_enaddr[i] = rom_enetaddr[i];
239 }
240
241 printf("\n%s: MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
242 device_xname(self),
243 sc->sc_enaddr[0],sc->sc_enaddr[1],sc->sc_enaddr[2],
244 sc->sc_enaddr[3],sc->sc_enaddr[4],sc->sc_enaddr[5]);
245
246 xsc->sc_bst = ia->ia_bst;
247 if (bus_space_map(xsc->sc_bst, NEXT_P_ENET,
248 XE_DEVICE_SIZE, 0, &xsc->sc_bsh)) {
249 panic("\n%s: can't map mb8795 registers",
250 device_xname(self));
251 }
252
253 sc->sc_bmap_bst = ia->ia_bst;
254 if (bus_space_map(sc->sc_bmap_bst, NEXT_P_BMAP,
255 BMAP_SIZE, 0, &sc->sc_bmap_bsh))
256 panic("\n%s: can't map bmap registers", device_xname(self));
257
258 /* Set up glue for MI code. */
259 sc->sc_glue = &xe_glue;
260
261 xsc->sc_txdma = nextdma_findchannel("enetx");
262 xsc->sc_rxdma = nextdma_findchannel("enetr");
263 if (xsc->sc_rxdma && xsc->sc_txdma)
264 findchannel_defer(self);
265 else
266 config_defer(self, findchannel_defer);
267
268 attached = 1;
269 }
270
271 int
xe_tint(void * arg)272 xe_tint(void *arg)
273 {
274 if (!INTR_OCCURRED(NEXT_I_ENETX))
275 return 0;
276 mb8795_tint((struct mb8795_softc *)arg);
277 return 1;
278 }
279
280 int
xe_rint(void * arg)281 xe_rint(void *arg)
282 {
283 if (!INTR_OCCURRED(NEXT_I_ENETR))
284 return 0;
285 mb8795_rint((struct mb8795_softc *)arg);
286 return 1;
287 }
288
289 /*
290 * Glue functions.
291 */
292
293 u_char
xe_read_reg(struct mb8795_softc * sc,int reg)294 xe_read_reg(struct mb8795_softc *sc, int reg)
295 {
296 struct xe_softc *xsc = (struct xe_softc *)sc;
297
298 return bus_space_read_1(xsc->sc_bst, xsc->sc_bsh, reg);
299 }
300
301 void
xe_write_reg(struct mb8795_softc * sc,int reg,u_char val)302 xe_write_reg(struct mb8795_softc *sc, int reg, u_char val)
303 {
304 struct xe_softc *xsc = (struct xe_softc *)sc;
305
306 bus_space_write_1(xsc->sc_bst, xsc->sc_bsh, reg, val);
307 }
308
309 void
xe_dma_reset(struct mb8795_softc * sc)310 xe_dma_reset(struct mb8795_softc *sc)
311 {
312 struct xe_softc *xsc = (struct xe_softc *)sc;
313 int i;
314
315 DPRINTF(("xe DMA reset\n"));
316
317 nextdma_reset(xsc->sc_rxdma);
318 nextdma_reset(xsc->sc_txdma);
319
320 if (xsc->sc_tx_loaded) {
321 bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap,
322 0, xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
323 bus_dmamap_unload(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap);
324 xsc->sc_tx_loaded = 0;
325 }
326 m_freem(xsc->sc_tx_mb_head);
327 xsc->sc_tx_mb_head = NULL;
328
329 for(i = 0; i < MB8795_NRXBUFS; i++) {
330 if (xsc->sc_rx_mb_head[i]) {
331 bus_dmamap_unload(xsc->sc_rxdma->sc_dmat,
332 xsc->sc_rx_dmamap[i]);
333 m_freem(xsc->sc_rx_mb_head[i]);
334 xsc->sc_rx_mb_head[i] = NULL;
335 }
336 }
337 }
338
339 void
xe_dma_rx_setup(struct mb8795_softc * sc)340 xe_dma_rx_setup(struct mb8795_softc *sc)
341 {
342 struct xe_softc *xsc = (struct xe_softc *)sc;
343 int i;
344
345 DPRINTF(("xe DMA rx setup\n"));
346
347 for(i = 0; i < MB8795_NRXBUFS; i++)
348 xsc->sc_rx_mb_head[i] =
349 xe_dma_rxmap_load(sc, xsc->sc_rx_dmamap[i]);
350
351 xsc->sc_rx_loaded_idx = 0;
352 xsc->sc_rx_completed_idx = 0;
353 xsc->sc_rx_handled_idx = 0;
354
355 nextdma_init(xsc->sc_rxdma);
356 }
357
358 void
xe_dma_rx_go(struct mb8795_softc * sc)359 xe_dma_rx_go(struct mb8795_softc *sc)
360 {
361 struct xe_softc *xsc = (struct xe_softc *)sc;
362
363 DPRINTF(("xe DMA rx go\n"));
364
365 nextdma_start(xsc->sc_rxdma, DMACSR_SETREAD);
366 }
367
368 struct mbuf *
xe_dma_rx_mbuf(struct mb8795_softc * sc)369 xe_dma_rx_mbuf(struct mb8795_softc *sc)
370 {
371 struct xe_softc *xsc = (struct xe_softc *)sc;
372 bus_dmamap_t map;
373 struct mbuf *m;
374
375 m = NULL;
376 if (xsc->sc_rx_handled_idx != xsc->sc_rx_completed_idx) {
377 xsc->sc_rx_handled_idx++;
378 xsc->sc_rx_handled_idx %= MB8795_NRXBUFS;
379
380 map = xsc->sc_rx_dmamap[xsc->sc_rx_handled_idx];
381 m = xsc->sc_rx_mb_head[xsc->sc_rx_handled_idx];
382
383 m->m_len = map->dm_xfer_len;
384
385 bus_dmamap_sync(xsc->sc_rxdma->sc_dmat, map,
386 0, map->dm_mapsize, BUS_DMASYNC_POSTREAD);
387
388 bus_dmamap_unload(xsc->sc_rxdma->sc_dmat, map);
389
390 /* Install a fresh mbuf for next packet */
391
392 xsc->sc_rx_mb_head[xsc->sc_rx_handled_idx] =
393 xe_dma_rxmap_load(sc,map);
394
395 /* Punt runt packets
396 * DMA restarts create 0 length packets for example
397 */
398 if (m->m_len < ETHER_MIN_LEN) {
399 m_freem(m);
400 m = NULL;
401 }
402 }
403 return m;
404 }
405
406 void
xe_dma_tx_setup(struct mb8795_softc * sc)407 xe_dma_tx_setup(struct mb8795_softc *sc)
408 {
409 struct xe_softc *xsc = (struct xe_softc *)sc;
410
411 DPRINTF(("xe DMA tx setup\n"));
412
413 nextdma_init(xsc->sc_txdma);
414 }
415
416 void
xe_dma_tx_go(struct mb8795_softc * sc)417 xe_dma_tx_go(struct mb8795_softc *sc)
418 {
419 struct xe_softc *xsc = (struct xe_softc *)sc;
420
421 DPRINTF(("xe DMA tx go\n"));
422
423 nextdma_start(xsc->sc_txdma, DMACSR_SETWRITE);
424 }
425
426 int
xe_dma_tx_mbuf(struct mb8795_softc * sc,struct mbuf * m)427 xe_dma_tx_mbuf(struct mb8795_softc *sc, struct mbuf *m)
428 {
429 struct xe_softc *xsc = (struct xe_softc *)sc;
430 int error;
431
432 xsc->sc_tx_mb_head = m;
433
434 /* The following is a next specific hack that should
435 * probably be moved out of MI code.
436 * This macro assumes it can move forward as needed
437 * in the buffer. Perhaps it should zero the extra buffer.
438 */
439 #define REALIGN_DMABUF(s,l) \
440 { (s) = ((u_char *)(((unsigned)(s)+DMA_BEGINALIGNMENT-1) \
441 &~(DMA_BEGINALIGNMENT-1))); \
442 (l) = ((u_char *)(((unsigned)((s)+(l))+DMA_ENDALIGNMENT-1) \
443 &~(DMA_ENDALIGNMENT-1)))-(s);}
444
445 #if 0
446 error = bus_dmamap_load_mbuf(xsc->sc_txdma->sc_dmat,
447 xsc->sc_tx_dmamap, xsc->sc_tx_mb_head, BUS_DMA_NOWAIT);
448 #else
449 {
450 u_char *buf = xsc->sc_txbuf;
451 int buflen = 0;
452
453 buflen = m->m_pkthdr.len;
454
455 {
456 u_char *p = buf;
457 for (m=xsc->sc_tx_mb_head; m; m = m->m_next) {
458 if (m->m_len == 0) continue;
459 memcpy(p, mtod(m, u_char *), m->m_len);
460 p += m->m_len;
461 }
462 /* Fix runt packets */
463 if (buflen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
464 memset(p, 0,
465 ETHER_MIN_LEN - ETHER_CRC_LEN - buflen);
466 buflen = ETHER_MIN_LEN - ETHER_CRC_LEN;
467 }
468 }
469
470 error = bus_dmamap_load(xsc->sc_txdma->sc_dmat,
471 xsc->sc_tx_dmamap, buf, buflen, NULL, BUS_DMA_NOWAIT);
472 }
473 #endif
474 if (error) {
475 aprint_error_dev(sc->sc_dev,
476 "can't load mbuf chain, error = %d\n", error);
477 m_freem(xsc->sc_tx_mb_head);
478 xsc->sc_tx_mb_head = NULL;
479 return error;
480 }
481
482 #ifdef DIAGNOSTIC
483 if (xsc->sc_tx_loaded != 0) {
484 panic("%s: xsc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
485 xsc->sc_tx_loaded);
486 }
487 #endif
488
489 bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap, 0,
490 xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
491
492 return 0;
493 }
494
495 int
xe_dma_tx_isactive(struct mb8795_softc * sc)496 xe_dma_tx_isactive(struct mb8795_softc *sc)
497 {
498 struct xe_softc *xsc = (struct xe_softc *)sc;
499
500 return (xsc->sc_tx_loaded != 0);
501 }
502
503 /****************************************************************/
504
505 void
xe_dma_tx_completed(bus_dmamap_t map,void * arg)506 xe_dma_tx_completed(bus_dmamap_t map, void *arg)
507 {
508 #if defined (XE_DEBUG) || defined (DIAGNOSTIC)
509 struct mb8795_softc *sc = arg;
510 #endif
511 #ifdef DIAGNOSTIC
512 struct xe_softc *xsc = (struct xe_softc *)sc;
513 #endif
514
515 DPRINTF(("%s: xe_dma_tx_completed()\n", device_xname(sc->sc_dev)));
516
517 #ifdef DIAGNOSTIC
518 if (!xsc->sc_tx_loaded)
519 panic("%s: tx completed never loaded",
520 device_xname(sc->sc_dev));
521
522 if (map != xsc->sc_tx_dmamap)
523 panic("%s: unexpected tx completed map",
524 device_xname(sc->sc_dev));
525
526 #endif
527 }
528
529 void
xe_dma_tx_shutdown(void * arg)530 xe_dma_tx_shutdown(void *arg)
531 {
532 struct mb8795_softc *sc = arg;
533 struct xe_softc *xsc = (struct xe_softc *)sc;
534 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
535
536 DPRINTF(("%s: xe_dma_tx_shutdown()\n", device_xname(sc->sc_dev)));
537
538 #ifdef DIAGNOSTIC
539 if (!xsc->sc_tx_loaded)
540 panic("%s: tx shutdown never loaded",
541 device_xname(sc->sc_dev));
542 #endif
543
544 if (turbo)
545 MB_WRITE_REG(sc, MB8795_TXMODE, MB8795_TXMODE_TURBO1);
546 if (xsc->sc_tx_loaded) {
547 bus_dmamap_sync(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap,
548 0, xsc->sc_tx_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
549 bus_dmamap_unload(xsc->sc_txdma->sc_dmat, xsc->sc_tx_dmamap);
550 m_freem(xsc->sc_tx_mb_head);
551 xsc->sc_tx_mb_head = NULL;
552
553 xsc->sc_tx_loaded--;
554 }
555
556 #ifdef DIAGNOSTIC
557 if (xsc->sc_tx_loaded != 0)
558 panic("%s: sc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
559 xsc->sc_tx_loaded);
560 #endif
561
562 ifp->if_timer = 0;
563
564 #if 1
565 if ((ifp->if_flags & IFF_RUNNING) && !IF_IS_EMPTY(&sc->sc_tx_snd)) {
566 void mb8795_start_dma(struct mb8795_softc *); /* XXXX */
567 mb8795_start_dma(sc);
568 }
569 #endif
570
571 #if 0
572 /* Enable ready interrupt */
573 MB_WRITE_REG(sc, MB8795_TXMASK,
574 MB_READ_REG(sc, MB8795_TXMASK)
575 | MB8795_TXMASK_TXRXIE/* READYIE */);
576 #endif
577 }
578
579
580 void
xe_dma_rx_completed(bus_dmamap_t map,void * arg)581 xe_dma_rx_completed(bus_dmamap_t map, void *arg)
582 {
583 struct mb8795_softc *sc = arg;
584 struct xe_softc *xsc = (struct xe_softc *)sc;
585 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
586
587 if (ifp->if_flags & IFF_RUNNING) {
588 xsc->sc_rx_completed_idx++;
589 xsc->sc_rx_completed_idx %= MB8795_NRXBUFS;
590
591 DPRINTF(("%s: xe_dma_rx_completed(), "
592 "sc->sc_rx_completed_idx = %d\n",
593 device_xname(sc->sc_dev), xsc->sc_rx_completed_idx));
594
595 #if (defined(DIAGNOSTIC))
596 if (map != xsc->sc_rx_dmamap[xsc->sc_rx_completed_idx])
597 panic("%s: Unexpected rx dmamap completed",
598 device_xname(sc->sc_dev));
599 #endif
600 }
601 #ifdef DIAGNOSTIC
602 else
603 DPRINTF(("%s: Unexpected rx dmamap completed while if not "
604 "running\n", device_xname(sc->sc_dev)));
605 #endif
606 }
607
608 void
xe_dma_rx_shutdown(void * arg)609 xe_dma_rx_shutdown(void *arg)
610 {
611 struct mb8795_softc *sc = arg;
612 struct xe_softc *xsc = (struct xe_softc *)sc;
613 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
614
615 if (ifp->if_flags & IFF_RUNNING) {
616 DPRINTF(("%s: xe_dma_rx_shutdown(), restarting.\n",
617 device_xname(sc->sc_dev)));
618
619 nextdma_start(xsc->sc_rxdma, DMACSR_SETREAD);
620 if (turbo)
621 MB_WRITE_REG(sc, MB8795_RXMODE,
622 MB8795_RXMODE_TEST | MB8795_RXMODE_MULTICAST);
623 }
624 #ifdef DIAGNOSTIC
625 else
626 DPRINTF(("%s: Unexpected rx DMA shutdown while if not "
627 "running\n", device_xname(sc->sc_dev)));
628 #endif
629 }
630
631 /*
632 * load a dmamap with a freshly allocated mbuf
633 */
634 struct mbuf *
xe_dma_rxmap_load(struct mb8795_softc * sc,bus_dmamap_t map)635 xe_dma_rxmap_load(struct mb8795_softc *sc, bus_dmamap_t map)
636 {
637 struct xe_softc *xsc = (struct xe_softc *)sc;
638 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
639 struct mbuf *m;
640 int error;
641
642 MGETHDR(m, M_DONTWAIT, MT_DATA);
643 if (m) {
644 MCLGET(m, M_DONTWAIT);
645 if ((m->m_flags & M_EXT) == 0) {
646 m_freem(m);
647 m = NULL;
648 } else
649 m->m_len = MCLBYTES;
650 }
651 if (!m) {
652 /*
653 * @@@ Handle this gracefully by reusing a scratch buffer
654 * or something.
655 */
656 panic("Unable to get memory for incoming ethernet");
657 }
658
659 /*
660 * Align buffer, @@@ next specific.
661 * perhaps should be using M_ALIGN here instead?
662 * First we give us a little room to align with.
663 */
664 {
665 u_char *buf = m->m_data;
666 int buflen = m->m_len;
667 buflen -= DMA_ENDALIGNMENT+DMA_BEGINALIGNMENT;
668 REALIGN_DMABUF(buf, buflen);
669 m->m_data = buf;
670 m->m_len = buflen;
671 }
672
673 m_set_rcvif(m, ifp);
674 m->m_pkthdr.len = m->m_len;
675
676 error = bus_dmamap_load_mbuf(xsc->sc_rxdma->sc_dmat,
677 map, m, BUS_DMA_NOWAIT);
678
679 bus_dmamap_sync(xsc->sc_rxdma->sc_dmat, map, 0,
680 map->dm_mapsize, BUS_DMASYNC_PREREAD);
681
682 if (error) {
683 DPRINTF(("DEBUG: m->m_data = %p, m->m_len = %d\n",
684 m->m_data, m->m_len));
685 DPRINTF(("DEBUG: MCLBYTES = %d, map->_dm_size = %ld\n",
686 MCLBYTES, map->_dm_size));
687
688 panic("%s: can't load rx mbuf chain, error = %d",
689 device_xname(sc->sc_dev), error);
690 m_freem(m);
691 m = NULL;
692 }
693
694 return m;
695 }
696
697 bus_dmamap_t
xe_dma_rx_continue(void * arg)698 xe_dma_rx_continue(void *arg)
699 {
700 struct mb8795_softc *sc = arg;
701 struct xe_softc *xsc = (struct xe_softc *)sc;
702 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
703 bus_dmamap_t map = NULL;
704
705 if (ifp->if_flags & IFF_RUNNING) {
706 if (((xsc->sc_rx_loaded_idx+1)%MB8795_NRXBUFS)
707 == xsc->sc_rx_handled_idx) {
708 /* Make space for one packet by dropping one */
709 struct mbuf *m;
710 m = xe_dma_rx_mbuf (sc);
711 if (m)
712 m_freem(m);
713 #if (defined(DIAGNOSTIC))
714 DPRINTF(("%s: out of receive DMA buffers\n",
715 device_xname(sc->sc_dev)));
716 #endif
717 }
718 xsc->sc_rx_loaded_idx++;
719 xsc->sc_rx_loaded_idx %= MB8795_NRXBUFS;
720 map = xsc->sc_rx_dmamap[xsc->sc_rx_loaded_idx];
721
722 DPRINTF(("%s: xe_dma_rx_continue() xsc->sc_rx_loaded_idx "
723 "= %d\n", device_xname(sc->sc_dev),
724 xsc->sc_rx_loaded_idx));
725 }
726 #ifdef DIAGNOSTIC
727 else
728 panic("%s: Unexpected rx DMA continue while if not running",
729 device_xname(sc->sc_dev));
730 #endif
731
732 return map;
733 }
734
735 bus_dmamap_t
xe_dma_tx_continue(void * arg)736 xe_dma_tx_continue(void *arg)
737 {
738 struct mb8795_softc *sc = arg;
739 struct xe_softc *xsc = (struct xe_softc *)sc;
740 bus_dmamap_t map;
741
742 DPRINTF(("%s: xe_dma_tx_continue()\n", device_xname(sc->sc_dev)));
743
744 if (xsc->sc_tx_loaded)
745 map = NULL;
746 else {
747 map = xsc->sc_tx_dmamap;
748 xsc->sc_tx_loaded++;
749 }
750
751 #ifdef DIAGNOSTIC
752 if (xsc->sc_tx_loaded != 1)
753 panic("%s: sc->sc_tx_loaded is %d", device_xname(sc->sc_dev),
754 xsc->sc_tx_loaded);
755 #endif
756
757 return map;
758 }
759