1 /* $NetBSD: com_aubus.c,v 1.9 2019/01/11 23:10:40 thorpej Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: com_aubus.c,v 1.9 2019/01/11 23:10:40 thorpej Exp $");
40
41 #include <sys/param.h>
42 #include <sys/device.h>
43 #include <sys/lwp.h>
44 #include <sys/systm.h>
45 #include <sys/tty.h>
46
47 #include <sys/bus.h>
48 #include <dev/ic/comvar.h>
49
50 #include <mips/alchemy/include/aureg.h>
51 #include <mips/alchemy/include/auvar.h>
52 #include <mips/alchemy/include/aubusvar.h>
53 #include <mips/alchemy/dev/com_aubus_reg.h>
54
55 struct com_aubus_softc {
56 struct com_softc sc_com;
57 int sc_irq;
58 void *sc_ih;
59 };
60
61 static int com_aubus_probe(device_t, cfdata_t , void *);
62 static void com_aubus_attach(device_t, device_t, void *);
63 static int com_aubus_enable(struct com_softc *);
64 static void com_aubus_disable(struct com_softc *);
65 static void com_aubus_init_regs(struct com_regs *, bus_space_tag_t,
66 bus_space_handle_t, bus_addr_t);
67
68 CFATTACH_DECL_NEW(com_aubus, sizeof(struct com_aubus_softc),
69 com_aubus_probe, com_aubus_attach, NULL, NULL);
70
71 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
72
73 int
com_aubus_probe(device_t parent,cfdata_t cf,void * aux)74 com_aubus_probe(device_t parent, cfdata_t cf, void *aux)
75 {
76 struct aubus_attach_args *aa = aux;
77
78 /* match only aucom devices */
79 if (strcmp(aa->aa_name, cf->cf_name) == 0)
80 return (1);
81
82 return (0);
83 }
84
85 void
com_aubus_attach(device_t parent,device_t self,void * aux)86 com_aubus_attach(device_t parent, device_t self, void *aux)
87 {
88 struct com_aubus_softc *asc = device_private(self);
89 struct com_softc *sc = &asc->sc_com;
90 struct aubus_attach_args *aa = aux;
91 bus_space_handle_t bsh;
92 int addr = aa->aa_addr;
93
94 sc->sc_dev = self;
95 asc->sc_irq = aa->aa_irq[0];
96
97 if (com_is_console(aa->aa_st, addr, &bsh) == 0 &&
98 bus_space_map(aa->aa_st, addr, AUCOM_NPORTS, 0,
99 &sc->sc_regs.cr_ioh) != 0) {
100 aprint_error(": can't map i/o space\n");
101 return;
102 }
103
104 com_aubus_init_regs(&sc->sc_regs, aa->aa_st, bsh, addr);
105
106 /*
107 * The input to the clock divider is the internal pbus clock (1/4 the
108 * processor frequency). The actual baud rate of the interface will
109 * be pbus_freq / CLKDIV.
110 */
111 sc->sc_frequency = curcpu()->ci_cpu_freq / 4;
112
113 sc->sc_hwflags = COM_HW_NO_TXPRELOAD;
114 sc->sc_type = COM_TYPE_AU1x00;
115
116 sc->enable = com_aubus_enable;
117 sc->disable = com_aubus_disable;
118
119 /* Enable UART so we can access it. */
120 com_aubus_enable(sc);
121 sc->enabled = 1;
122
123 /* Attach MI com driver. */
124 com_attach_subr(sc);
125
126 /* Disable UART if it's not the console. (XXX kgdb?) */
127 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
128 com_aubus_disable(sc);
129 sc->enabled = 0;
130 }
131 }
132
133 int
com_aubus_enable(struct com_softc * sc)134 com_aubus_enable(struct com_softc *sc)
135 {
136 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */
137
138 /* Ignore requests to enable an already enabled console. */
139 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE) && (asc->sc_ih != NULL))
140 return (0);
141
142 /* Enable the UART module. */
143 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh, AUCOM_MODCTL,
144 UMC_ME | UMC_CE);
145
146 /* Establish the interrupt. */
147 asc->sc_ih = au_intr_establish(asc->sc_irq, 0, IPL_SERIAL, IST_LEVEL,
148 comintr, sc);
149 if (asc->sc_ih == NULL) {
150 aprint_error_dev(sc->sc_dev,
151 "unable to establish interrupt\n");
152 return (1);
153 }
154
155 return (0);
156 }
157
158 void
com_aubus_disable(struct com_softc * sc)159 com_aubus_disable(struct com_softc *sc)
160 {
161 struct com_aubus_softc *asc = (void *)sc; /* XXX mi prototype */
162
163 /* Ignore requests to disable the console. */
164 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
165 return;
166
167 /* Disestablish the interrupt. */
168 au_intr_disestablish(asc->sc_ih);
169
170 /* Disable the UART module. */
171 bus_space_write_1(sc->sc_regs.cr_iot, sc->sc_regs.cr_ioh,
172 AUCOM_MODCTL, 0);
173 }
174
175 static const bus_size_t com_aubus_regmap[COM_REGMAP_NENTRIES] = {
176 [COM_REG_RXDATA] = AUCOM_RXDATA,
177 [COM_REG_TXDATA] = AUCOM_TXDATA,
178 [COM_REG_DLBL] = AUCOM_DLB,
179 [COM_REG_DLBH] = AUCOM_DLB,
180 [COM_REG_IER] = AUCOM_IER,
181 [COM_REG_IIR] = AUCOM_IIR,
182 [COM_REG_FIFO] = AUCOM_FIFO,
183 [COM_REG_TCR] = AUCOM_FIFO,
184 [COM_REG_LCR] = AUCOM_LCTL,
185 [COM_REG_MCR] = AUCOM_MCR,
186 [COM_REG_LSR] = AUCOM_LSR,
187 [COM_REG_MSR] = AUCOM_MSR,
188 };
189
190 void
com_aubus_init_regs(struct com_regs * regsp,bus_space_tag_t bst,bus_space_handle_t bsh,bus_addr_t addr)191 com_aubus_init_regs(struct com_regs *regsp, bus_space_tag_t bst,
192 bus_space_handle_t bsh, bus_addr_t addr)
193 {
194
195 com_init_regs(regsp, bst, bsh, addr);
196
197 memcpy(regsp->cr_map, com_aubus_regmap, sizeof(regsp->cr_map));
198 regsp->cr_nports = AUCOM_NPORTS;
199 }
200
201 int
com_aubus_cnattach(bus_addr_t addr,int baud)202 com_aubus_cnattach(bus_addr_t addr, int baud)
203 {
204 struct com_regs regs;
205 uint32_t sysfreq;
206
207 com_aubus_init_regs(®s, aubus_st, (bus_space_handle_t)0/*XXX*/,
208 addr);
209
210 sysfreq = curcpu()->ci_cpu_freq / 4;
211
212 return comcnattach1(®s, baud, sysfreq, COM_TYPE_AU1x00, CONMODE);
213 }
214