xref: /netbsd-src/sys/arch/mips/alchemy/dev/aupsc.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1 /* $NetBSD: aupsc.c,v 1.9 2021/08/07 16:18:58 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2006 Shigeyuki Fukushima.
5  * All rights reserved.
6  *
7  * Written by Shigeyuki Fukushima.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above
15  *    copyright notice, this list of conditions and the following
16  *    disclaimer in the documentation and/or other materials provided
17  *    with the distribution.
18  * 3. The name of the author may not be used to endorse or promote
19  *    products derived from this software without specific prior
20  *    written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
23  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
26  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
28  * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: aupsc.c,v 1.9 2021/08/07 16:18:58 thorpej Exp $");
37 
38 #include "locators.h"
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43 #include <sys/errno.h>
44 
45 #include <sys/bus.h>
46 #include <machine/cpu.h>
47 
48 #include <mips/alchemy/include/aubusvar.h>
49 #include <mips/alchemy/include/aureg.h>
50 #include <mips/alchemy/dev/aupscreg.h>
51 #include <mips/alchemy/dev/aupscvar.h>
52 #include <mips/alchemy/dev/ausmbus_pscreg.h>
53 
54 struct aupsc_softc {
55 	device_t		sc_dev;
56 	bus_space_tag_t		sc_bust;
57 	bus_space_handle_t	sc_bush;
58 	int			sc_pscsel;
59 };
60 
61 const struct aupsc_proto {
62 	const char *name;
63 	int protocol;
64 } aupsc_protos [] = {
65 	{ "ausmbus", AUPSC_SEL_SMBUS },
66 	{ "auspi", AUPSC_SEL_SPI },
67 #if 0
68 	{ "auaudio" },
69 	{ "aui2s" },
70 #endif
71 	{ NULL, AUPSC_SEL_DISABLE }
72 };
73 
74 static int	aupsc_match(device_t, struct cfdata *, void *);
75 static void	aupsc_attach(device_t, device_t, void *);
76 static int	aupsc_submatch(device_t, struct cfdata *, const int *, void *);
77 static int	aupsc_print(void *, const char *);
78 
79 static void	aupsc_enable(void *, int);
80 static void	aupsc_disable(void *);
81 static void	aupsc_suspend(void *);
82 
83 
84 CFATTACH_DECL_NEW(aupsc, sizeof(struct aupsc_softc),
85 	aupsc_match, aupsc_attach, NULL, NULL);
86 
87 static int
aupsc_match(device_t parent,struct cfdata * cf,void * aux)88 aupsc_match(device_t parent, struct cfdata *cf, void *aux)
89 {
90 	struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
91 
92 	if (strcmp(aa->aa_name, cf->cf_name) != 0)
93 		return 0;
94 
95 	return 1;
96 }
97 
98 static void
aupsc_attach(device_t parent,device_t self,void * aux)99 aupsc_attach(device_t parent, device_t self, void *aux)
100 {
101 	int i;
102 	uint32_t rv;
103 	struct aupsc_softc *sc = device_private(self);
104 	struct aubus_attach_args *aa = (struct aubus_attach_args *)aux;
105 	struct aupsc_attach_args pa;
106 	struct aupsc_controller ctrl;
107 
108 	sc->sc_dev = self;
109 	sc->sc_bust = aa->aa_st;
110 	if (bus_space_map(sc->sc_bust, aa->aa_addr,
111 			AUPSC_SIZE, 0, &sc->sc_bush) != 0) {
112 		aprint_error(": unable to map device registers\n");
113 		return;
114 	}
115 
116 	/* Initialize PSC_SEL register */
117 	sc->sc_pscsel = AUPSC_SEL_DISABLE;
118 	rv = bus_space_read_4(sc->sc_bust, sc->sc_bush, AUPSC_SEL);
119 	bus_space_write_4(sc->sc_bust, sc->sc_bush,
120 		AUPSC_SEL, (rv & AUPSC_SEL_PS(AUPSC_SEL_DISABLE)));
121 	bus_space_write_4(sc->sc_bust, sc->sc_bush,
122 		AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_DISABLE));
123 
124 	aprint_normal(": Alchemy PSC\n");
125 	aprint_naive("\n");
126 
127 	ctrl.psc_bust = sc->sc_bust;
128 	ctrl.psc_bush = sc->sc_bush;
129 	ctrl.psc_sel = &(sc->sc_pscsel);
130 	ctrl.psc_enable = aupsc_enable;
131 	ctrl.psc_disable = aupsc_disable;
132 	ctrl.psc_suspend = aupsc_suspend;
133 	pa.aupsc_ctrl = ctrl;
134 	pa.aupsc_addr = aa->aa_addr;
135 	pa.aupsc_irq = aa->aa_irq[0];
136 
137 	for (i = 0 ; aupsc_protos[i].name != NULL ; i++) {
138 		struct aupsc_protocol_device p;
139 		uint32_t s;
140 
141 		pa.aupsc_name = aupsc_protos[i].name;
142 
143 		p.sc_dev = sc->sc_dev;
144 		p.sc_ctrl = ctrl;
145 
146 		aupsc_enable(&p, aupsc_protos[i].protocol);
147 		s = bus_space_read_4(sc->sc_bust, sc->sc_bush, AUPSC_STAT);
148 		aupsc_disable(&p);
149 
150 		if (s & AUPSC_STAT_SR) {
151 			config_found(self, &pa, aupsc_print,
152 			    CFARGS(.submatch = aupsc_submatch));
153 		}
154         }
155 }
156 
157 static int
aupsc_submatch(device_t parent,struct cfdata * cf,const int * ldesc,void * aux)158 aupsc_submatch(device_t parent, struct cfdata *cf, const int *ldesc, void *aux)
159 {
160 
161 	return config_match(parent, cf, aux);
162 }
163 
164 static int
aupsc_print(void * aux,const char * pnp)165 aupsc_print(void *aux, const char *pnp)
166 {
167 	/*
168 	 * By default we don't want to print anything, because
169 	 * otherwise we see complaints about protocols that aren't
170 	 * configured on every port.  (E.g. each PSC can support 4
171 	 * protocols, but on a typical design, only one protocol can
172 	 * be configured per board.)
173 	 *
174 	 * Basically, this whole thing should be replaced with an
175 	 * indirect configuration mechanism.  Direct configuration
176 	 * doesn't make sense when we absolutely require kernel
177 	 * configuration to operate.
178 	 *
179 	 * Alternatively, a board-specific configuration mechanism
180 	 * could determine this, and provide direct configuration as
181 	 * we do for PCMCIA.
182 	 */
183 
184 	return QUIET;
185 }
186 
187 static void
aupsc_enable(void * arg,int proto)188 aupsc_enable(void *arg, int proto)
189 {
190 	struct aupsc_protocol_device *sc = arg;
191 	int i;
192 
193 	/* XXX: (TODO) setting clock AUPSC_SEL_CLK */
194 	switch (proto) {
195 	case AUPSC_SEL_SPI:
196 	case AUPSC_SEL_I2S:
197 	case AUPSC_SEL_AC97:
198 	case AUPSC_SEL_SMBUS:
199 		break;
200 	case AUPSC_SEL_DISABLE:
201 		aupsc_disable(arg);
202 		break;
203 	default:
204 		printf("%s: aupsc_enable: unsupported protocol.\n",
205 			device_xname(sc->sc_dev));
206 		return;
207 	}
208 
209 	if (*(sc->sc_ctrl.psc_sel) != AUPSC_SEL_DISABLE) {
210 		printf("%s: aupsc_enable: please disable first.\n",
211 			device_xname(sc->sc_dev));
212 		return;
213 	}
214 
215 	bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
216 			AUPSC_SEL, AUPSC_SEL_PS(proto));
217 	bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
218 			AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_ENABLE));
219 
220 	/* wait up to a whole second, but test every 10us */
221 	for (i = 1000000; i; i -= 10) {
222 		if (bus_space_read_4(sc->sc_ctrl.psc_bust,
223 			sc->sc_ctrl.psc_bush, AUPSC_STAT) & AUPSC_STAT_SR)
224 			return;
225 		delay(10);
226 	}
227 }
228 
229 static void
aupsc_disable(void * arg)230 aupsc_disable(void *arg)
231 {
232 	struct aupsc_protocol_device *sc = arg;
233 
234 	bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
235 			AUPSC_SEL, AUPSC_SEL_PS(AUPSC_SEL_DISABLE));
236 	bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
237 			AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_DISABLE));
238 	delay(1);
239 }
240 
241 static void
aupsc_suspend(void * arg)242 aupsc_suspend(void *arg)
243 {
244 	struct aupsc_protocol_device *sc = arg;
245 
246 	bus_space_write_4(sc->sc_ctrl.psc_bust, sc->sc_ctrl.psc_bush,
247 			AUPSC_CTRL, AUPSC_CTRL_ENA(AUPSC_CTRL_SUSPEND));
248 	delay(1);
249 }
250