1 /* $NetBSD: sbc_obio.c,v 1.26 2024/11/22 07:16:01 nat Exp $ */ 2 3 /* 4 * Copyright (C) 1996,1997 Scott Reynolds. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: sbc_obio.c,v 1.26 2024/11/22 07:16:01 nat Exp $"); 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/errno.h> 37 #include <sys/device.h> 38 #include <sys/buf.h> 39 #include <sys/proc.h> 40 41 #include <dev/scsipi/scsi_all.h> 42 #include <dev/scsipi/scsipi_all.h> 43 #include <dev/scsipi/scsipi_debug.h> 44 #include <dev/scsipi/scsiconf.h> 45 46 #include <dev/ic/ncr5380reg.h> 47 #include <dev/ic/ncr5380var.h> 48 49 #include <machine/cpu.h> 50 #include <machine/bus.h> 51 #include <machine/viareg.h> 52 53 #include <mac68k/dev/sbcreg.h> 54 #include <mac68k/dev/sbcvar.h> 55 56 #include <mac68k/obio/obiovar.h> 57 58 /* 59 * From Guide to the Macintosh Family Hardware, pp. 137-143 60 * These are offsets from SCSIBase (see pmap_bootstrap.c) 61 */ 62 #define SBC_REG_OFS 0x10000 63 #define SBC_DMA_OFS 0x12000 64 #define SBC_HSK_OFS 0x06000 65 66 #define SBC_DMA_OFS_PB500 0x06000 67 68 #define SBC_REG_OFS_IIFX 0x08000 /* Just guessing... */ 69 #define SBC_DMA_OFS_IIFX 0x0c000 70 #define SBC_HSK_OFS_IIFX 0x0e000 71 72 #define SBC_REG_OFS_DUO2 0x00000 73 #define SBC_DMA_OFS_DUO2 0x02000 74 #define SBC_HSK_OFS_DUO2 0x04000 75 76 static int sbc_obio_match(device_t, cfdata_t, void *); 77 static void sbc_obio_attach(device_t, device_t, void *); 78 79 void sbc_intr_enable(struct ncr5380_softc *); 80 void sbc_intr_disable(struct ncr5380_softc *); 81 void sbc_obio_clrintr(struct ncr5380_softc *); 82 83 CFATTACH_DECL_NEW(sbc_obio, sizeof(struct sbc_softc), 84 sbc_obio_match, sbc_obio_attach, NULL, NULL); 85 86 static int 87 sbc_obio_match(device_t parent, cfdata_t cf, void *aux) 88 { 89 struct obio_attach_args *oa = aux; 90 91 switch (current_mac_model->machineid) { 92 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 93 if (oa->oa_addr == 0) 94 return 1; 95 break; 96 97 case MACH_MACPB210: 98 case MACH_MACPB230: 99 case MACH_MACPB250: 100 case MACH_MACPB270: 101 case MACH_MACPB280: 102 case MACH_MACPB280C: 103 if (oa->oa_addr == 1) 104 return 1; 105 /*FALLTHROUGH*/ 106 default: 107 if (oa->oa_addr == 0 && mac68k_machine.scsi80) 108 return 1; 109 } 110 return 0; 111 } 112 113 static void 114 sbc_obio_attach(device_t parent, device_t self, void *aux) 115 { 116 struct sbc_softc *sc = device_private(self); 117 struct ncr5380_softc *ncr_sc = &sc->ncr_sc; 118 struct obio_attach_args *oa = aux; 119 char bits[64]; 120 extern vaddr_t SCSIBase; 121 122 ncr_sc->sc_dev = self; 123 /* Pull in the options flags. */ 124 sc->sc_options = ((device_cfdata(self)->cf_flags | 125 sbc_options) & SBC_OPTIONS_MASK); 126 127 /* 128 * Set up offsets to 5380 registers and GLUE I/O space, and turn 129 * off options we know we can't support on certain models. 130 */ 131 switch (current_mac_model->machineid) { 132 case MACH_MACIIFX: /* Note: the IIfx isn't (yet) supported. */ 133 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS_IIFX); 134 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS_IIFX); 135 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_IIFX); 136 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 137 break; 138 case MACH_MACPB500: 139 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 140 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); /*??*/ 141 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS_PB500); 142 sc->sc_options &= ~(SBC_INTR | SBC_RESELECT); 143 break; 144 case MACH_MACPB210: 145 case MACH_MACPB230: 146 case MACH_MACPB250: 147 case MACH_MACPB270: 148 case MACH_MACPB280: 149 case MACH_MACPB280C: 150 if (oa->oa_addr == 1) { 151 sc->sc_regs = (struct sbc_regs *)(0xfee00000 + SBC_REG_OFS_DUO2); 152 sc->sc_drq_addr = (vaddr_t)(0xfee00000 + SBC_HSK_OFS_DUO2); 153 sc->sc_nodrq_addr = (vaddr_t)(0xfee00000 + SBC_DMA_OFS_DUO2); 154 break; 155 } 156 /*FALLTHROUGH*/ 157 default: 158 sc->sc_regs = (struct sbc_regs *)(SCSIBase + SBC_REG_OFS); 159 sc->sc_drq_addr = (vaddr_t)(SCSIBase + SBC_HSK_OFS); 160 sc->sc_nodrq_addr = (vaddr_t)(SCSIBase + SBC_DMA_OFS); 161 break; 162 } 163 164 /* 165 * Initialize fields used by the MI code 166 */ 167 ncr_sc->sci_r0 = &sc->sc_regs->sci_pr0.sci_reg; 168 ncr_sc->sci_r1 = &sc->sc_regs->sci_pr1.sci_reg; 169 ncr_sc->sci_r2 = &sc->sc_regs->sci_pr2.sci_reg; 170 ncr_sc->sci_r3 = &sc->sc_regs->sci_pr3.sci_reg; 171 ncr_sc->sci_r4 = &sc->sc_regs->sci_pr4.sci_reg; 172 ncr_sc->sci_r5 = &sc->sc_regs->sci_pr5.sci_reg; 173 ncr_sc->sci_r6 = &sc->sc_regs->sci_pr6.sci_reg; 174 ncr_sc->sci_r7 = &sc->sc_regs->sci_pr7.sci_reg; 175 176 ncr_sc->sc_rev = NCR_VARIANT_NCR5380; 177 178 /* 179 * MD function pointers used by the MI code. 180 */ 181 if (sc->sc_options & SBC_PDMA) { 182 ncr_sc->sc_pio_out = sbc_pdma_out; 183 ncr_sc->sc_pio_in = sbc_pdma_in; 184 } else { 185 ncr_sc->sc_pio_out = ncr5380_pio_out; 186 ncr_sc->sc_pio_in = ncr5380_pio_in; 187 } 188 ncr_sc->sc_dma_alloc = NULL; 189 ncr_sc->sc_dma_free = NULL; 190 ncr_sc->sc_dma_poll = NULL; 191 ncr_sc->sc_intr_on = NULL; 192 ncr_sc->sc_intr_off = NULL; 193 ncr_sc->sc_dma_setup = NULL; 194 ncr_sc->sc_dma_start = NULL; 195 ncr_sc->sc_dma_eop = NULL; 196 ncr_sc->sc_dma_stop = NULL; 197 ncr_sc->sc_flags = 0; 198 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 199 200 if (sc->sc_options & SBC_INTR) { 201 ncr_sc->sc_dma_alloc = sbc_dma_alloc; 202 ncr_sc->sc_dma_free = sbc_dma_free; 203 ncr_sc->sc_dma_poll = sbc_dma_poll; 204 ncr_sc->sc_dma_setup = sbc_dma_setup; 205 ncr_sc->sc_dma_start = sbc_dma_start; 206 ncr_sc->sc_dma_eop = sbc_dma_eop; 207 ncr_sc->sc_dma_stop = sbc_dma_stop; 208 via2_register_irq(VIA2_SCSIDRQ, sbc_drq_intr, ncr_sc); 209 } 210 211 mutex_init(&sc->sc_drq_lock, MUTEX_DEFAULT, IPL_SOFTBIO); 212 213 via2_register_irq(VIA2_SCSIIRQ, sbc_irq_intr, ncr_sc); 214 sc->sc_clrintr = sbc_obio_clrintr; 215 216 if ((sc->sc_options & SBC_RESELECT) == 0) 217 ncr_sc->sc_no_disconnect = 0xff; 218 219 if (sc->sc_options) { 220 snprintb(bits, sizeof(bits), SBC_OPTIONS_BITS, sc->sc_options); 221 aprint_normal(": options=%s", bits); 222 } 223 aprint_normal("\n"); 224 225 if (sc->sc_options & (SBC_INTR|SBC_RESELECT)) { 226 /* Enable SCSI interrupts through VIA2 */ 227 sbc_intr_enable(ncr_sc); 228 } 229 230 #ifdef SBC_DEBUG 231 if (sbc_debug) 232 aprint_debug_dev(self, "softc=%p regs=%p\n", sc, sc->sc_regs); 233 #endif 234 235 ncr_sc->sc_channel.chan_id = 7; 236 ncr_sc->sc_adapter.adapt_minphys = minphys; 237 238 /* 239 * Initialize the SCSI controller itself. 240 */ 241 ncr5380_attach(ncr_sc); 242 } 243 244 /* 245 * Interrupt support routines. 246 */ 247 void 248 sbc_intr_enable(struct ncr5380_softc *ncr_sc) 249 { 250 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 251 int s, flags; 252 253 flags = V2IF_SCSIIRQ; 254 if (sc->sc_options & SBC_INTR) 255 flags |= V2IF_SCSIDRQ; 256 257 s = splhigh(); 258 if (VIA2 == VIA2OFF) 259 via2_reg(vIER) = 0x80 | flags; 260 else 261 via2_reg(rIER) = 0x80 | flags; 262 splx(s); 263 } 264 265 void 266 sbc_intr_disable(struct ncr5380_softc *ncr_sc) 267 { 268 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 269 int s, flags; 270 271 flags = V2IF_SCSIIRQ; 272 if (sc->sc_options & SBC_INTR) 273 flags |= V2IF_SCSIDRQ; 274 275 s = splhigh(); 276 if (VIA2 == VIA2OFF) 277 via2_reg(vIER) = flags; 278 else 279 via2_reg(rIER) = flags; 280 splx(s); 281 } 282 283 void 284 sbc_obio_clrintr(struct ncr5380_softc *ncr_sc) 285 { 286 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc; 287 int flags; 288 289 flags = V2IF_SCSIIRQ; 290 if (sc->sc_options & SBC_INTR) 291 flags |= V2IF_SCSIDRQ; 292 293 if (VIA2 == VIA2OFF) 294 via2_reg(vIFR) = 0x80 | flags; 295 else 296 via2_reg(rIFR) = 0x80 | flags; 297 } 298