1 /* $NetBSD: zs.c,v 1.63 2023/09/23 12:48:23 andvar Exp $ */
2
3 /*
4 * Copyright (c) 1996-1998 Bill Studenmund
5 * Copyright (c) 1995 Gordon W. Ross
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /*
30 * Zilog Z8530 Dual UART driver (machine-dependent part)
31 *
32 * Runs two serial lines per chip using slave drivers.
33 * Plain tty/async lines use the zs_async slave.
34 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
35 * Other ports use their own mice & keyboard slaves.
36 *
37 * Credits & history:
38 *
39 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
40 * (port-sun3?) zs.c driver (which was in turn based on code in the
41 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
42 * help from Allen Briggs and Gordon Ross <gwr@NetBSD.org>. Noud de
43 * Brouwer field-tested the driver at a local ISP.
44 *
45 * Bill Studenmund and Gordon Ross then ported the machine-independent
46 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
47 * intermediate version (mac68k using a local, patched version of
48 * the m.i. drivers), with NetBSD 1.3 containing a full version.
49 */
50
51 #include <sys/cdefs.h>
52 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.63 2023/09/23 12:48:23 andvar Exp $");
53
54 #include "opt_ddb.h"
55 #include "opt_mac68k.h"
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/proc.h>
60 #include <sys/device.h>
61 #include <sys/conf.h>
62 #include <sys/file.h>
63 #include <sys/ioctl.h>
64 #include <sys/tty.h>
65 #include <sys/time.h>
66 #include <sys/kernel.h>
67 #include <sys/syslog.h>
68 #include <sys/cpu.h>
69 #include <sys/intr.h>
70
71 #include <machine/autoconf.h>
72 #include <machine/psc.h>
73 #include <machine/viareg.h>
74
75 #include <dev/cons.h>
76 #include <dev/ic/z8530reg.h>
77 #include <machine/z8530var.h>
78 #include <mac68k/dev/zs_cons.h>
79
80 /* Are these in a header file anywhere? */
81 /* Booter flags interface */
82 #define ZSMAC_RAW 0x01
83 #define ZSMAC_LOCALTALK 0x02
84
85 #define PCLK (9600 * 384)
86
87 /*
88 * Some warts needed by z8530tty.c -
89 */
90 int zs_def_cflag = (CREAD | CS8 | HUPCL);
91
92 /*
93 * abort detection on console will now timeout after iterating on a loop
94 * the following # of times. Cheep hack. Also, abort detection is turned
95 * off after a timeout (i.e. maybe there's not a terminal hooked up).
96 */
97 #define ZSABORT_DELAY 3000000
98
99 /*
100 * Define interrupt levels.
101 */
102 #define ZSHARD_PRI 4 /* Wired on the CPU board... */
103 /*
104 * Serial port cards with zs chips on them are actually at the
105 * NuBus interrupt level, which is lower than 4. But blocking
106 * level 4 interrupts will block those interrupts too, so level
107 * 4 is fine.
108 */
109
110 /* The layout of this is hardware-dependent (padding, order). */
111 struct zschan {
112 volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
113 uint8_t zc_xxx0;
114 uint8_t zc_xxx1; /* part of the other channel lives here! */
115 uint8_t zc_xxx2; /* Yea Apple! */
116 volatile uint8_t zc_data; /* data */
117 uint8_t zc_xxx3;
118 uint8_t zc_xxx4;
119 uint8_t zc_xxx5;
120 };
121
122 /* Flags from cninit() */
123 static int zs_hwflags[2];
124 /* Default speed for each channel */
125 static int zs_defspeed[2] = {
126 9600, /* tty00 */
127 9600, /* tty01 */
128 };
129 /* console stuff */
130 void *zs_conschan;
131 int zs_consunit;
132 #ifdef ZS_CONSOLE_ABORT
133 int zs_cons_canabort = 1;
134 #else
135 int zs_cons_canabort = 0;
136 #endif /* ZS_CONSOLE_ABORT*/
137 /* device to which the console is attached--if serial. */
138 dev_t mac68k_zsdev;
139 /* Mac stuff */
140 extern volatile unsigned char *sccA;
141
142 int zs_cn_check_speed(int);
143
144 /*
145 * Even though zsparam will set up the clock multiples, etc., we
146 * still set them here as: 1) mice & keyboards don't use zsparam,
147 * and 2) the console stuff uses these defaults before device
148 * attach.
149 */
150
151 static uint8_t zs_init_reg[16] = {
152 0, /* 0: CMD (reset, etc.) */
153 0, /* 1: No interrupts yet. */
154 0x18 + ZSHARD_PRI, /* IVECT */
155 ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
156 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
157 ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
158 0, /* 6: TXSYNC/SYNCLO */
159 0, /* 7: RXSYNC/SYNCHI */
160 0, /* 8: alias for data port */
161 ZSWR9_MASTER_IE,
162 0, /*10: Misc. TX/RX control bits */
163 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
164 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
165 0, /*13: BAUDHI (default=9600) */
166 ZSWR14_BAUD_ENA,
167 ZSWR15_BREAK_IE,
168 };
169
170 struct zschan *
zs_get_chan_addr(int channel)171 zs_get_chan_addr(int channel)
172 {
173 char *addr;
174 struct zschan *zc;
175
176 addr = (char *)__UNVOLATILE(sccA);
177 if (channel == 0) {
178 zc = (struct zschan *)(addr + 2);
179 /* handle the fact the ports are intertwined. */
180 } else {
181 zc = (struct zschan *)(addr);
182 }
183 return (zc);
184 }
185
186
187 /* Find PROM mappings (for console support). */
188 int zsinited = 0; /* 0 = not, 1 = inited, not attached, 2= attached */
189
190 void
zs_init(void)191 zs_init(void)
192 {
193 zsinited = 1;
194 if (zs_conschan != 0){ /* we might have moved io under the console */
195 zs_conschan = zs_get_chan_addr(zs_consunit);
196 /* so recalc the console port */
197 }
198 }
199
200
201 /****************************************************************
202 * Autoconfig
203 ****************************************************************/
204
205 /* Definition of the driver for autoconfig. */
206 static int zsc_match(device_t, cfdata_t, void *);
207 static void zsc_attach(device_t, device_t, void *);
208 static int zsc_print(void *, const char *);
209
210 CFATTACH_DECL_NEW(zsc, sizeof(struct zsc_softc),
211 zsc_match, zsc_attach, NULL, NULL);
212
213 extern struct cfdriver zsc_cd;
214
215 int zshard(void *);
216
217 /*
218 * Is the zs chip present?
219 */
220 static int
zsc_match(device_t parent,cfdata_t cf,void * aux)221 zsc_match(device_t parent, cfdata_t cf, void *aux)
222 {
223 if (zsinited == 2)
224 return 0;
225
226 return 1;
227 }
228
229 /*
230 * Attach a found zs.
231 *
232 * Match slave number to zs unit number, so that misconfiguration will
233 * not set up the keyboard as ttya, etc.
234 */
235 static void
zsc_attach(device_t parent,device_t self,void * aux)236 zsc_attach(device_t parent, device_t self, void *aux)
237 {
238 struct zsc_softc *zsc = device_private(self);
239 struct zsc_attach_args zsc_args;
240 volatile struct zschan *zc;
241 struct xzs_chanstate *xcs;
242 struct zs_chanstate *cs;
243 int s, chip, theflags, channel;
244
245 zsc->zsc_dev = self;
246 if (!zsinited)
247 zs_init();
248 zsinited = 2;
249
250 chip = 0; /* We'll deal with chip types post 1.2 */
251 aprint_normal(" chip type %d \n",chip);
252
253 /*
254 * Initialize software state for each channel.
255 */
256 for (channel = 0; channel < 2; channel++) {
257 zsc_args.channel = channel;
258 zsc_args.hwflags = zs_hwflags[channel];
259 xcs = &zsc->xzsc_xcs_store[channel];
260 cs = &xcs->xzs_cs;
261 zsc->zsc_cs[channel] = cs;
262
263 zs_lock_init(cs);
264 cs->cs_channel = channel;
265 cs->cs_private = NULL;
266 cs->cs_ops = &zsops_null;
267
268 zc = zs_get_chan_addr(channel);
269 cs->cs_reg_csr = &zc->zc_csr;
270 cs->cs_reg_data = &zc->zc_data;
271
272 memcpy(cs->cs_creg, zs_init_reg, 16);
273 memcpy(cs->cs_preg, zs_init_reg, 16);
274
275 /* Current BAUD rate generator clock. */
276 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */
277 cs->cs_defspeed = zs_defspeed[channel];
278 cs->cs_defcflag = zs_def_cflag;
279
280 /* Make these correspond to cs_defcflag (-crtscts) */
281 cs->cs_rr0_dcd = ZSRR0_DCD;
282 cs->cs_rr0_cts = 0;
283 cs->cs_wr5_dtr = ZSWR5_DTR;
284 cs->cs_wr5_rts = 0;
285
286 #ifdef __notyet__
287 cs->cs_slave_type = ZS_SLAVE_NONE;
288 #endif
289
290 /* Define BAUD rate stuff. */
291 xcs->cs_clocks[0].clk = PCLK;
292 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
293 xcs->cs_clocks[1].flags =
294 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
295 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
296 xcs->cs_clock_count = 3;
297 if (channel == 0) {
298 theflags = mac68k_machine.modem_flags;
299 xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;
300 xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;
301 } else {
302 theflags = mac68k_machine.print_flags;
303 xcs->cs_clocks[1].flags = ZSC_VARIABLE;
304 /*
305 * Yes, we aren't defining ANY clock source enables for the
306 * printer's DCD clock in. The hardware won't let us
307 * use it. But a clock will freak out the chip, so we
308 * let you set it, telling us to bar interrupts on the line.
309 */
310 xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;
311 xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;
312 }
313 if (xcs->cs_clocks[1].clk)
314 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
315 if (xcs->cs_clocks[2].clk)
316 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
317
318 printf("zsc%d channel %d: d_speed %6d DCD clk %ld CTS clk %ld",
319 device_unit(self), channel, cs->cs_defspeed,
320 xcs->cs_clocks[1].clk, xcs->cs_clocks[2].clk);
321
322 /* Set defaults in our "extended" chanstate. */
323 xcs->cs_csource = 0;
324 xcs->cs_psource = 0;
325 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */
326 xcs->cs_pclk_flag = 0;
327
328 if (theflags & ZSMAC_RAW) {
329 zsc_args.hwflags |= ZS_HWFLAG_RAW;
330 printf(" (raw defaults)");
331 }
332
333 /*
334 * XXX - This might be better done with a "stub" driver
335 * (to replace zstty) that ignores LocalTalk for now.
336 */
337 if (theflags & ZSMAC_LOCALTALK) {
338 printf(" shielding from LocalTalk");
339 cs->cs_defspeed = 1;
340 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
341 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
342 zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
343 zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
344 /*
345 * If we might have LocalTalk, then make sure we have the
346 * Baud rate low-enough to not do any damage.
347 */
348 }
349
350 /*
351 * We used to disable chip interrupts here, but we now
352 * do that in zscnprobe, just in case MacOS left the chip on.
353 */
354
355 xcs->cs_chip = chip;
356
357 /* Stash away a copy of the final H/W flags. */
358 xcs->cs_hwflags = zsc_args.hwflags;
359
360 printf("\n");
361
362 /*
363 * Look for a child driver for this channel.
364 * The child attach will setup the hardware.
365 */
366 if (!config_found(self, (void *)&zsc_args, zsc_print,
367 CFARGS_NONE)) {
368 /* No sub-driver. Just reset it. */
369 uint8_t reset = (channel == 0) ?
370 ZSWR9_A_RESET : ZSWR9_B_RESET;
371 s = splzs();
372 zs_write_reg(cs, 9, reset);
373 splx(s);
374 }
375 }
376
377 if (current_mac_model->class == MACH_CLASSAV) {
378 add_psc_lev4_intr(PSCINTR_SCCA, zshard, zsc);
379 add_psc_lev4_intr(PSCINTR_SCCB, zshard, zsc);
380 } else {
381 intr_establish(zshard, zsc, ZSHARD_PRI);
382 }
383 zsc->zsc_softintr_cookie = softint_establish(SOFTINT_SERIAL,
384 (void (*)(void *))zsc_intr_soft, zsc);
385
386 /* Now safe to enable interrupts. */
387
388 /*
389 * Set the master interrupt enable and interrupt vector.
390 * (common to both channels, do it on A)
391 */
392 cs = zsc->zsc_cs[0];
393 s = splzs();
394 /* interrupt vector */
395 zs_write_reg(cs, 2, zs_init_reg[2]);
396 /* master interrupt control (enable) */
397 zs_write_reg(cs, 9, zs_init_reg[9]);
398 splx(s);
399 }
400
401 static int
zsc_print(void * aux,const char * name)402 zsc_print(void *aux, const char *name)
403 {
404 struct zsc_attach_args *args = aux;
405
406 if (name != NULL)
407 aprint_normal("%s: ", name);
408
409 if (args->channel != -1)
410 aprint_normal(" channel %d", args->channel);
411
412 return UNCONF;
413 }
414
415 int
zsmdioctl(struct zs_chanstate * cs,u_long cmd,void * data)416 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data)
417 {
418 switch (cmd) {
419 default:
420 return (EPASSTHROUGH);
421 }
422 return (0);
423 }
424
425 void
zsmd_setclock(struct zs_chanstate * cs)426 zsmd_setclock(struct zs_chanstate *cs)
427 {
428 struct xzs_chanstate *xcs = (void *)cs;
429
430 if (cs->cs_channel != 0)
431 return;
432
433 /*
434 * If the new clock has the external bit set, then select the
435 * external source.
436 */
437 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
438 }
439
440 /*
441 * Do the minimum work to pull data off of the chip and queue it up
442 * for later processing.
443 */
444 int
zshard(void * arg)445 zshard(void *arg)
446 {
447 struct zsc_softc *zsc = arg;
448 int rval;
449
450 if (zsc == NULL)
451 return 0;
452
453 rval = zsc_intr_hard(zsc);
454 if ((zsc->zsc_cs[0]->cs_softreq) || (zsc->zsc_cs[1]->cs_softreq)) {
455 softint_schedule(zsc->zsc_softintr_cookie);
456 }
457 return (rval);
458 }
459
460 #ifndef ZS_TOLERANCE
461 #define ZS_TOLERANCE 51
462 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
463 #endif
464
465 /*
466 * check out a rate for acceptability from the internal clock
467 * source. Used in console config to validate a requested
468 * default speed. Placed here so that all the speed checking code is
469 * in one place.
470 *
471 * != 0 means ok.
472 */
473 int
zs_cn_check_speed(int bps)474 zs_cn_check_speed(int bps)
475 {
476 int tc, rate;
477
478 tc = BPS_TO_TCONST(PCLK / 16, bps);
479 if (tc < 0)
480 return 0;
481 rate = TCONST_TO_BPS(PCLK / 16, tc);
482 if (ZS_TOLERANCE > abs(((rate - bps)*1000)/bps))
483 return 1;
484 else
485 return 0;
486 }
487
488 /*
489 * Search through the signal sources in the channel, and
490 * pick the best one for the baud rate requested. Return
491 * a -1 if not achievable in tolerance. Otherwise return 0
492 * and fill in the values.
493 *
494 * This routine draws inspiration from the Atari port's zs.c
495 * driver in NetBSD 1.1 which did the same type of source switching.
496 * Tolerance code inspired by comspeed routine in isa/com.c.
497 *
498 * By Bill Studenmund, 1996-05-12
499 */
500 int
zs_set_speed(struct zs_chanstate * cs,int bps)501 zs_set_speed(struct zs_chanstate *cs, int bps)
502 {
503 struct xzs_chanstate *xcs = (void *) cs;
504 int i, tc, tc0 = 0, tc1, s, sf = 0;
505 int src, rate0, rate1, err, tol;
506
507 if (bps == 0)
508 return (0);
509
510 src = -1; /* no valid source yet */
511 tol = ZS_TOLERANCE;
512
513 /*
514 * Step through all the sources and see which one matches
515 * the best. A source has to match BETTER than tol to be chosen.
516 * Thus if two sources give the same error, the first one will be
517 * chosen. Also, allow for the possibility that one source might run
518 * both the BRG and the direct divider (i.e. RTxC).
519 */
520 for (i=0; i < xcs->cs_clock_count; i++) {
521 if (xcs->cs_clocks[i].clk <= 0)
522 continue; /* skip non-existent or bad clocks */
523 if (xcs->cs_clocks[i].flags & ZSC_BRG) {
524 /* check out BRG at /16 */
525 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
526 if (tc1 >= 0) {
527 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
528 err = abs(((rate1 - bps)*1000)/bps);
529 if (err < tol) {
530 tol = err;
531 src = i;
532 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
533 tc0 = tc1;
534 rate0 = rate1;
535 }
536 }
537 }
538 if (xcs->cs_clocks[i].flags & ZSC_DIV) {
539 /*
540 * Check out either /1, /16, /32, or /64
541 * Note: for /1, you'd better be using a synchronized
542 * clock!
543 */
544 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
545 int b1 = b0 >> 4, e1 = abs(b1-bps);
546 int b2 = b1 >> 1, e2 = abs(b2-bps);
547 int b3 = b2 >> 1, e3 = abs(b3-bps);
548
549 if (e0 < e1 && e0 < e2 && e0 < e3) {
550 err = e0;
551 rate1 = b0;
552 tc1 = ZSWR4_CLK_X1;
553 } else if (e0 > e1 && e1 < e2 && e1 < e3) {
554 err = e1;
555 rate1 = b1;
556 tc1 = ZSWR4_CLK_X16;
557 } else if (e0 > e2 && e1 > e2 && e2 < e3) {
558 err = e2;
559 rate1 = b2;
560 tc1 = ZSWR4_CLK_X32;
561 } else {
562 err = e3;
563 rate1 = b3;
564 tc1 = ZSWR4_CLK_X64;
565 }
566
567 err = (err * 1000)/bps;
568 if (err < tol) {
569 tol = err;
570 src = i;
571 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
572 tc0 = tc1;
573 rate0 = rate1;
574 }
575 }
576 }
577 #ifdef ZSMACDEBUG
578 printf("Checking for rate %d. Found source #%d.\n", bps, src);
579 #endif
580 if (src == -1)
581 return (EINVAL); /* no can do */
582
583 /*
584 * The M.I. layer likes to keep cs_brg_clk current, even though
585 * we are the only ones who should be touching the BRG's rate.
586 *
587 * Note: we are assuming that any ZSC_EXTERN signal source comes in
588 * on the RTxC pin. Correct for the mac68k obio zsc.
589 */
590 if (sf & ZSC_EXTERN)
591 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
592 else
593 cs->cs_brg_clk = PCLK / 16;
594
595 /*
596 * Now we have a source, so set it up.
597 */
598 s = splzs();
599 xcs->cs_psource = src;
600 xcs->cs_pclk_flag = sf;
601 bps = rate0;
602 if (sf & ZSC_BRG) {
603 cs->cs_preg[4] = ZSWR4_CLK_X16;
604 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
605 if (sf & ZSC_PCLK) {
606 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
607 } else {
608 cs->cs_preg[14] = ZSWR14_BAUD_ENA;
609 }
610 tc = tc0;
611 } else {
612 cs->cs_preg[4] = tc0;
613 if (sf & ZSC_RTXDIV) {
614 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
615 } else {
616 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
617 }
618 cs->cs_preg[14]= 0;
619 tc = 0xffff;
620 }
621 /* Set the BAUD rate divisor. */
622 cs->cs_preg[12] = tc;
623 cs->cs_preg[13] = tc >> 8;
624 splx(s);
625
626 #ifdef ZSMACDEBUG
627 printf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n",
628 bps, tc, src, sf);
629 printf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
630 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
631 #endif
632
633 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */
634
635 /* Caller will stuff the pending registers. */
636 return (0);
637 }
638
639 int
zs_set_modes(struct zs_chanstate * cs,int cflag)640 zs_set_modes(struct zs_chanstate *cs, int cflag)
641 {
642 struct xzs_chanstate *xcs = (void*)cs;
643 int s;
644
645 /*
646 * Make sure we don't enable hfc on a signal line we're ignoring.
647 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
648 * this code also effectively turns off ZSWR15_CTS_IE.
649 *
650 * Also, disable DCD interrupts if we've been told to ignore
651 * the DCD pin. Happens on mac68k because the input line for
652 * DCD can also be used as a clock input. (Just set CLOCAL.)
653 *
654 * If someone tries to turn an invalid flow mode on, Just Say No
655 * (Suggested by gwr)
656 */
657 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
658 return (EINVAL);
659 cs->cs_rr0_pps = 0;
660 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
661 if (cflag & MDMBUF)
662 return (EINVAL);
663 cflag |= CLOCAL;
664 } else {
665 /*
666 * cs->cs_rr0_pps indicates which bit MAY be used for pps.
667 * Enable only if nothing else will want the interrupt and
668 * it's ok to enable interrupts on this line.
669 */
670 if ((cflag & (CLOCAL | MDMBUF)) == CLOCAL)
671 cs->cs_rr0_pps = ZSRR0_DCD;
672 }
673 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
674 return (EINVAL);
675
676 /*
677 * Output hardware flow control on the chip is horrendous:
678 * if carrier detect drops, the receiver is disabled, and if
679 * CTS drops, the transmitter is stopped IN MID CHARACTER!
680 * Therefore, NEVER set the HFC bit, and instead use the
681 * status interrupt to detect CTS changes.
682 */
683 s = splzs();
684 if ((cflag & (CLOCAL | MDMBUF)) != 0)
685 cs->cs_rr0_dcd = 0;
686 else
687 cs->cs_rr0_dcd = ZSRR0_DCD;
688 /*
689 * The mac hardware only has one output, DTR (HSKo in Mac
690 * parlance). In HFC mode, we use it for the functions
691 * typically served by RTS and DTR on other ports, so we
692 * have to fake the upper layer out some.
693 *
694 * CRTSCTS we use CTS as an input which tells us when to shut up.
695 * We make no effort to shut up the other side of the connection.
696 * DTR is used to hang up the modem.
697 *
698 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
699 * shut up the other side.
700 */
701 if ((cflag & CRTSCTS) != 0) {
702 cs->cs_wr5_dtr = ZSWR5_DTR;
703 cs->cs_wr5_rts = 0;
704 cs->cs_rr0_cts = ZSRR0_CTS;
705 } else if ((cflag & CDTRCTS) != 0) {
706 cs->cs_wr5_dtr = 0;
707 cs->cs_wr5_rts = ZSWR5_DTR;
708 cs->cs_rr0_cts = ZSRR0_CTS;
709 } else if ((cflag & MDMBUF) != 0) {
710 cs->cs_wr5_dtr = 0;
711 cs->cs_wr5_rts = ZSWR5_DTR;
712 cs->cs_rr0_cts = ZSRR0_DCD;
713 } else {
714 cs->cs_wr5_dtr = ZSWR5_DTR;
715 cs->cs_wr5_rts = 0;
716 cs->cs_rr0_cts = 0;
717 }
718 splx(s);
719
720 /* Caller will stuff the pending registers. */
721 return (0);
722 }
723
724
725 /*
726 * Read or write the chip with suitable delays.
727 * MacII hardware has the delay built in.
728 * No need for extra delay. :-) However, some clock-chirped
729 * macs, or zsc's on serial add-on boards might need it.
730 */
731 #define ZS_DELAY()
732
733 uint8_t
zs_read_reg(struct zs_chanstate * cs,uint8_t reg)734 zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
735 {
736 uint8_t val;
737
738 *cs->cs_reg_csr = reg;
739 ZS_DELAY();
740 val = *cs->cs_reg_csr;
741 ZS_DELAY();
742 return val;
743 }
744
745 void
zs_write_reg(struct zs_chanstate * cs,uint8_t reg,uint8_t val)746 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
747 {
748 *cs->cs_reg_csr = reg;
749 ZS_DELAY();
750 *cs->cs_reg_csr = val;
751 ZS_DELAY();
752 }
753
754 uint8_t
zs_read_csr(struct zs_chanstate * cs)755 zs_read_csr(struct zs_chanstate *cs)
756 {
757 uint8_t val;
758
759 val = *cs->cs_reg_csr;
760 ZS_DELAY();
761 /* make up for the fact CTS is wired backwards */
762 val ^= ZSRR0_CTS;
763 return val;
764 }
765
766 void
zs_write_csr(struct zs_chanstate * cs,uint8_t val)767 zs_write_csr(struct zs_chanstate *cs, uint8_t val)
768 {
769 /* Note, the csr does not write CTS... */
770 *cs->cs_reg_csr = val;
771 ZS_DELAY();
772 }
773
774 uint8_t
zs_read_data(struct zs_chanstate * cs)775 zs_read_data(struct zs_chanstate *cs)
776 {
777 uint8_t val;
778
779 val = *cs->cs_reg_data;
780 ZS_DELAY();
781 return val;
782 }
783
784 void
zs_write_data(struct zs_chanstate * cs,uint8_t val)785 zs_write_data(struct zs_chanstate *cs, uint8_t val)
786 {
787 *cs->cs_reg_data = val;
788 ZS_DELAY();
789 }
790
791 /****************************************************************
792 * Console support functions (mac68k specific!)
793 * Note: this code is allowed to know about the layout of
794 * the chip registers, and uses that to keep things simple.
795 * XXX - I think I like the mvme167 code better. -gwr
796 * XXX - Well :-P :-) -wrs
797 ****************************************************************/
798
799 #define zscnpollc nullcnpollc
800 cons_decl(zs);
801
802 static void zscnsetup(void);
803
804 /*
805 * Console functions.
806 */
807
808 /*
809 * This code modeled after the zs_setparam routine in zskgdb
810 * It sets the console unit to a known state so we can output
811 * correctly.
812 */
813 static void
zscnsetup(void)814 zscnsetup(void)
815 {
816 struct xzs_chanstate xcs;
817 struct zs_chanstate *cs;
818 struct zschan *zc;
819 int tconst, s;
820
821 /* Setup temporary chanstate. */
822 memset(&xcs, 0, sizeof(xcs));
823 cs = &xcs.xzs_cs;
824 zc = zs_conschan;
825 cs->cs_reg_csr = &zc->zc_csr;
826 cs->cs_reg_data = &zc->zc_data;
827 cs->cs_channel = zs_consunit;
828 cs->cs_brg_clk = PCLK / 16;
829
830 memcpy(cs->cs_preg, zs_init_reg, 16);
831 cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;
832 cs->cs_preg[15] = ZSWR15_BREAK_IE;
833 tconst = BPS_TO_TCONST(cs->cs_brg_clk, zs_defspeed[zs_consunit]);
834 cs->cs_preg[12] = tconst;
835 cs->cs_preg[13] = tconst >> 8;
836 /* can't use zs_set_speed as we haven't set up the
837 * signal sources, and it's not worth it for now
838 */
839
840 /*
841 * As zs_loadchannelregs doesn't touch reg 9 (interrupt control),
842 * we won't accidentally turn on interrupts below
843 */
844 s = splhigh();
845 zs_loadchannelregs(cs);
846 splx(s);
847 }
848
849 /*
850 * zscnprobe is the routine which gets called as the kernel is trying to
851 * figure out where the console should be. Each io driver which might
852 * be the console (as defined in mac68k/conf.c) gets probed. The probe
853 * fills in the consdev structure. Important parts are the device #,
854 * and the console priority. Values are CN_DEAD (don't touch me),
855 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
856 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
857 *
858 * As the mac's a bit different, we do extra work here. We mainly check
859 * to see if we have serial echo going on. Also chould check for default
860 * speeds.
861 */
862 void
zscnprobe(struct consdev * cp)863 zscnprobe(struct consdev * cp)
864 {
865 extern u_long IOBase;
866 int maj, unit, i;
867 extern const struct cdevsw zstty_cdevsw;
868
869 maj = cdevsw_lookup_major(&zstty_cdevsw);
870 if (maj != -1) {
871 cp->cn_pri = CN_NORMAL; /* Lower than CN_INTERNAL */
872 if (mac68k_machine.serial_console != 0) {
873 cp->cn_pri = CN_REMOTE; /* Higher than CN_INTERNAL */
874 mac68k_machine.serial_boot_echo =0;
875 }
876
877 unit = (mac68k_machine.serial_console == 1) ? 0 : 1;
878 zs_consunit = unit;
879 zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */
880
881 mac68k_zsdev = cp->cn_dev = makedev(maj, unit);
882 }
883 if (mac68k_machine.serial_boot_echo) {
884 /*
885 * at this point, we know that we don't have a serial
886 * console, but are doing echo
887 */
888 zs_conschan = (struct zschan *) -1; /* dummy flag for zs_init() */
889 zs_consunit = 1;
890 zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE;
891 }
892
893 if ((i = mac68k_machine.modem_d_speed) > 0) {
894 if (zs_cn_check_speed(i))
895 zs_defspeed[0] = i;
896 }
897 if ((i = mac68k_machine.print_d_speed) > 0) {
898 if (zs_cn_check_speed(i))
899 zs_defspeed[1] = i;
900 }
901 mac68k_set_io_offsets(IOBase);
902 zs_init();
903 /*
904 * zsinit will set up the addresses of the scc. It will also, if
905 * zs_conschan != 0, calculate the new address of the conschan for
906 * unit zs_consunit. So if we are (or think we are) going to use the
907 * chip for console I/O, we just set up the internal addresses for it.
908 *
909 * Now turn off interrupts for the chip. Note: using sccA to get at
910 * the chip is the only vestige of the NetBSD 1.0 ser driver. :-)
911 */
912 unit = sccA[2]; /* reset reg. access */
913 unit = sccA[0];
914 sccA[2] = 9; sccA[2] = 0; /* write 0 to reg. 9, clearing MIE */
915 sccA[2] = ZSWR0_CLR_INTR; unit = sccA[2]; /* reset any pending ints. */
916 sccA[0] = ZSWR0_CLR_INTR; unit = sccA[0];
917
918 if (mac68k_machine.serial_boot_echo)
919 zscnsetup();
920 return;
921 }
922
923 void
zscninit(struct consdev * cp)924 zscninit(struct consdev *cp)
925 {
926
927 zs_hwflags[zs_consunit] = ZS_HWFLAG_CONSOLE;
928
929 /*
930 * zsinit will set up the addresses of the scc. It will also, if
931 * zs_conschan != 0, calculate the new address of the conschan for
932 * unit zs_consunit. So zs_init implicitly sets zs_conschan to the right
933 * number. :-)
934 */
935 zscnsetup();
936 printf("\nNetBSD/mac68k console\n");
937 }
938
939
940 /*
941 * Polled input char.
942 */
943 int
zs_getc(void * arg)944 zs_getc(void *arg)
945 {
946 volatile struct zschan *zc = arg;
947 int s, c, rr0;
948
949 s = splhigh();
950 /* Wait for a character to arrive. */
951 do {
952 rr0 = zc->zc_csr;
953 ZS_DELAY();
954 } while ((rr0 & ZSRR0_RX_READY) == 0);
955
956 c = zc->zc_data;
957 ZS_DELAY();
958 splx(s);
959
960 /*
961 * This is used by the kd driver to read scan codes,
962 * so don't translate '\r' ==> '\n' here...
963 */
964 return (c);
965 }
966
967 /*
968 * Polled output char.
969 */
970 void
zs_putc(void * arg,int c)971 zs_putc(void *arg, int c)
972 {
973 volatile struct zschan *zc = arg;
974 int s, rr0;
975 long wait = 0;
976
977 s = splhigh();
978 /* Wait for transmitter to become ready. */
979 do {
980 rr0 = zc->zc_csr;
981 ZS_DELAY();
982 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
983
984 if ((rr0 & ZSRR0_TX_READY) != 0) {
985 zc->zc_data = c;
986 ZS_DELAY();
987 }
988 splx(s);
989 }
990
991
992 /*
993 * Polled console input putchar.
994 */
995 int
zscngetc(dev_t dev)996 zscngetc(dev_t dev)
997 {
998 struct zschan *zc = zs_conschan;
999 int c;
1000
1001 c = zs_getc(zc);
1002 return (c);
1003 }
1004
1005 /*
1006 * Polled console output putchar.
1007 */
1008 void
zscnputc(dev_t dev,int c)1009 zscnputc(dev_t dev, int c)
1010 {
1011 struct zschan *zc = zs_conschan;
1012
1013 zs_putc(zc, c);
1014 }
1015
1016
1017
1018 /*
1019 * Handle user request to enter kernel debugger.
1020 */
1021 void
zs_abort(struct zs_chanstate * cs)1022 zs_abort(struct zs_chanstate *cs)
1023 {
1024 volatile struct zschan *zc = zs_conschan;
1025 int rr0;
1026 long wait = 0;
1027
1028 if (zs_cons_canabort == 0)
1029 return;
1030
1031 /* Wait for end of break to avoid PROM abort. */
1032 do {
1033 rr0 = zc->zc_csr;
1034 ZS_DELAY();
1035 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
1036
1037 if (wait > ZSABORT_DELAY) {
1038 zs_cons_canabort = 0;
1039 /* If we time out, turn off the abort ability! */
1040 }
1041
1042 #ifdef DDB
1043 Debugger();
1044 #endif
1045 }
1046