19f231495Stakemura /*
29f231495Stakemura * Copyright (c) 2001 HAMAJIMA Katsuomi. All rights reserved.
39f231495Stakemura *
49f231495Stakemura * Redistribution and use in source and binary forms, with or without
59f231495Stakemura * modification, are permitted provided that the following conditions
69f231495Stakemura * are met:
79f231495Stakemura * 1. Redistributions of source code must retain the above copyright
89f231495Stakemura * notice, this list of conditions and the following disclaimer.
99f231495Stakemura * 2. Redistributions in binary form must reproduce the above copyright
109f231495Stakemura * notice, this list of conditions and the following disclaimer in the
119f231495Stakemura * documentation and/or other materials provided with the distribution.
129f231495Stakemura *
139f231495Stakemura * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
149f231495Stakemura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
159f231495Stakemura * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
169f231495Stakemura * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
179f231495Stakemura * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
189f231495Stakemura * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
199f231495Stakemura * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
209f231495Stakemura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
219f231495Stakemura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
229f231495Stakemura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
239f231495Stakemura * SUCH DAMAGE.
249f231495Stakemura */
259f231495Stakemura
260c82163cSlukem #include <sys/cdefs.h>
27*9b83c0f5Smatt __KERNEL_RCSID(0, "$NetBSD: vrdcu.c,v 1.8 2015/06/11 08:22:09 matt Exp $");
280c82163cSlukem
299f231495Stakemura #include <sys/param.h>
309f231495Stakemura #include <sys/systm.h>
319f231495Stakemura #include <sys/device.h>
329f231495Stakemura
339f231495Stakemura #include <uvm/uvm_extern.h>
349f231495Stakemura
359f231495Stakemura #include <machine/cpu.h>
369f231495Stakemura #include <machine/bus.h>
379f231495Stakemura #include <machine/bus_dma_hpcmips.h>
389f231495Stakemura
399f231495Stakemura #include <hpcmips/vr/vripif.h>
409f231495Stakemura #include <hpcmips/vr/dcureg.h>
419f231495Stakemura
429f231495Stakemura #ifdef VRDCU_DEBUG
439f231495Stakemura int vrdcu_debug = VRDCU_DEBUG;
449f231495Stakemura #define DPRINTFN(n,x) if (vrdcu_debug>(n)) printf x;
459f231495Stakemura #else
469f231495Stakemura #define DPRINTFN(n,x)
479f231495Stakemura #endif
489f231495Stakemura
499f231495Stakemura struct vrdcu_softc {
509f231495Stakemura bus_space_tag_t sc_iot;
519f231495Stakemura bus_space_handle_t sc_ioh;
529f231495Stakemura struct vrdcu_chipset_tag sc_chipset;
539f231495Stakemura int sc_status; /* DMA status */
549f231495Stakemura };
559f231495Stakemura
56cbab9cadSchs int vrdcu_match(device_t, cfdata_t, void *);
57cbab9cadSchs void vrdcu_attach(device_t, device_t, void *);
589f231495Stakemura
59cbab9cadSchs CFATTACH_DECL_NEW(vrdcu, sizeof(struct vrdcu_softc),
60c5e91d44Sthorpej vrdcu_match, vrdcu_attach, NULL, NULL);
619f231495Stakemura
629f231495Stakemura int vrdcu_enable_aiuin(vrdcu_chipset_tag_t);
639f231495Stakemura int vrdcu_enable_aiuout(vrdcu_chipset_tag_t);
649f231495Stakemura int vrdcu_enable_fir(vrdcu_chipset_tag_t);
659f231495Stakemura void vrdcu_disable(vrdcu_chipset_tag_t);
669f231495Stakemura void vrdcu_fir_direction(vrdcu_chipset_tag_t, int);
679f231495Stakemura int _vrdcu_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
689f231495Stakemura bus_size_t, bus_dma_segment_t *, int, int *, int);
699f231495Stakemura
709f231495Stakemura struct bus_dma_tag vrdcu_bus_dma_tag = {
719f231495Stakemura NULL,
729f231495Stakemura {
739f231495Stakemura _hpcmips_bd_map_create,
749f231495Stakemura _hpcmips_bd_map_destroy,
759f231495Stakemura _hpcmips_bd_map_load,
769f231495Stakemura _hpcmips_bd_map_load_mbuf,
779f231495Stakemura _hpcmips_bd_map_load_uio,
789f231495Stakemura _hpcmips_bd_map_load_raw,
799f231495Stakemura _hpcmips_bd_map_unload,
809f231495Stakemura _hpcmips_bd_map_sync,
819f231495Stakemura _vrdcu_dmamem_alloc,
829f231495Stakemura _hpcmips_bd_mem_free,
839f231495Stakemura _hpcmips_bd_mem_map,
849f231495Stakemura _hpcmips_bd_mem_unmap,
859f231495Stakemura _hpcmips_bd_mem_mmap,
869f231495Stakemura },
879f231495Stakemura };
889f231495Stakemura
899f231495Stakemura int
vrdcu_match(device_t parent,cfdata_t cf,void * aux)90cbab9cadSchs vrdcu_match(device_t parent, cfdata_t cf, void *aux)
919f231495Stakemura {
929f231495Stakemura return 2; /* 1st attach group of vrip */
939f231495Stakemura }
949f231495Stakemura
959f231495Stakemura void
vrdcu_attach(device_t parent,device_t self,void * aux)96cbab9cadSchs vrdcu_attach(device_t parent, device_t self, void *aux)
979f231495Stakemura {
989f231495Stakemura struct vrip_attach_args *va = aux;
99cbab9cadSchs struct vrdcu_softc *sc = device_private(self);
1009f231495Stakemura
1019f231495Stakemura sc->sc_iot = va->va_iot;
1029f231495Stakemura sc->sc_chipset.dc_sc = sc;
1039f231495Stakemura sc->sc_chipset.dc_enable_aiuin = vrdcu_enable_aiuin;
1049f231495Stakemura sc->sc_chipset.dc_enable_aiuout = vrdcu_enable_aiuout;
1059f231495Stakemura sc->sc_chipset.dc_enable_fir = vrdcu_enable_fir;
1069f231495Stakemura sc->sc_chipset.dc_disable = vrdcu_disable;
1079f231495Stakemura sc->sc_chipset.dc_fir_direction = vrdcu_fir_direction;
1089f231495Stakemura
1099f231495Stakemura if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
1109f231495Stakemura 0 /* no flags */, &sc->sc_ioh)) {
111cbab9cadSchs printf("%s: can't map i/o space\n", device_xname(self));
1129f231495Stakemura return;
1139f231495Stakemura }
1149f231495Stakemura printf("\n");
1159f231495Stakemura vrip_register_dcu(va->va_vc, &sc->sc_chipset);
1169f231495Stakemura
1179f231495Stakemura sc->sc_status = DMASDS;
1189f231495Stakemura /* reset DCU */
1199f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMARST_REG_W, DMARST);
1209f231495Stakemura }
1219f231495Stakemura
1229f231495Stakemura int
vrdcu_enable_aiuin(vrdcu_chipset_tag_t dc)1239f231495Stakemura vrdcu_enable_aiuin(vrdcu_chipset_tag_t dc)
1249f231495Stakemura {
1259f231495Stakemura struct vrdcu_softc *sc = dc->dc_sc;
1269f231495Stakemura int mask;
1279f231495Stakemura
1289f231495Stakemura DPRINTFN(1, ("vrdcu_enable_aiuin\n"));
1299f231495Stakemura
1309f231495Stakemura if (sc->sc_status){
1319f231495Stakemura mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W);
1329f231495Stakemura if (mask & DMAMSKAIN) {
1339f231495Stakemura DPRINTFN(0, ("vrdcu_enable_aiuin: already enabled\n"));
1349f231495Stakemura return 0;
1359f231495Stakemura } else {
1369f231495Stakemura DPRINTFN(0, ("vrdcu_enable_aiuin: device busy\n"));
1379f231495Stakemura return EBUSY;
1389f231495Stakemura }
1399f231495Stakemura }
1409f231495Stakemura sc->sc_status = DMASEN;
1419f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAIN);
1429f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
1439f231495Stakemura return 0;
1449f231495Stakemura }
1459f231495Stakemura
1469f231495Stakemura int
vrdcu_enable_aiuout(vrdcu_chipset_tag_t dc)1479f231495Stakemura vrdcu_enable_aiuout(vrdcu_chipset_tag_t dc)
1489f231495Stakemura {
1499f231495Stakemura struct vrdcu_softc *sc = dc->dc_sc;
1509f231495Stakemura int mask;
1519f231495Stakemura
1529f231495Stakemura DPRINTFN(1, ("vrdcu_enable_aiuout\n"));
1539f231495Stakemura
1549f231495Stakemura if (sc->sc_status){
1559f231495Stakemura mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W);
1569f231495Stakemura if (mask & DMAMSKAOUT) {
1579f231495Stakemura DPRINTFN(0, ("vrdcu_enable_aiuout: already enabled\n"));
1589f231495Stakemura return 0;
1599f231495Stakemura } else {
1609f231495Stakemura DPRINTFN(0, ("vrdcu_enable_aiuout: device busy\n"));
1619f231495Stakemura return EBUSY;
1629f231495Stakemura }
1639f231495Stakemura }
1649f231495Stakemura sc->sc_status = DMASEN;
1659f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKAOUT);
1669f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
1679f231495Stakemura return 0;
1689f231495Stakemura }
1699f231495Stakemura
1709f231495Stakemura int
vrdcu_enable_fir(vrdcu_chipset_tag_t dc)1719f231495Stakemura vrdcu_enable_fir(vrdcu_chipset_tag_t dc)
1729f231495Stakemura {
1739f231495Stakemura struct vrdcu_softc *sc = dc->dc_sc;
1749f231495Stakemura int mask;
1759f231495Stakemura
1769f231495Stakemura DPRINTFN(1, ("vrdcu_enable_fir\n"));
1779f231495Stakemura
1789f231495Stakemura if (sc->sc_status){
1799f231495Stakemura mask = bus_space_read_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W);
1809f231495Stakemura if (mask & DMAMSKFOUT) {
1819f231495Stakemura DPRINTFN(0, ("vrdcu_enable_fir: already enabled\n"));
1829f231495Stakemura return 0;
1839f231495Stakemura } else {
1849f231495Stakemura DPRINTFN(0, ("vrdcu_enable_fir: device busy\n"));
1859f231495Stakemura return EBUSY;
1869f231495Stakemura }
1879f231495Stakemura }
1889f231495Stakemura sc->sc_status = DMASEN;
1899f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMAMSK_REG_W, DMAMSKFOUT);
1909f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
1919f231495Stakemura return 0;
1929f231495Stakemura }
1939f231495Stakemura
1949f231495Stakemura void
vrdcu_disable(vrdcu_chipset_tag_t dc)1959f231495Stakemura vrdcu_disable(vrdcu_chipset_tag_t dc)
1969f231495Stakemura {
1979f231495Stakemura struct vrdcu_softc *sc = dc->dc_sc;
1989f231495Stakemura
1999f231495Stakemura DPRINTFN(1, ("vrdcu_disable\n"));
2009f231495Stakemura
2019f231495Stakemura sc->sc_status = DMASDS;
2029f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh, DMASEN_REG_W, sc->sc_status);
2039f231495Stakemura }
2049f231495Stakemura
2059f231495Stakemura void
vrdcu_fir_direction(vrdcu_chipset_tag_t dc,int dir)2069f231495Stakemura vrdcu_fir_direction(vrdcu_chipset_tag_t dc, int dir)
2079f231495Stakemura {
2089f231495Stakemura struct vrdcu_softc *sc = dc->dc_sc;
2099f231495Stakemura
2109f231495Stakemura DPRINTFN(1, ("vrdcu_fir_direction: dir %d\n", dir));
2119f231495Stakemura
2129f231495Stakemura bus_space_write_2(sc->sc_iot, sc->sc_ioh,
2139f231495Stakemura DMATD_REG_W, dir & DMATDMASK);
2149f231495Stakemura }
2159f231495Stakemura
2169f231495Stakemura int
_vrdcu_dmamem_alloc(bus_dma_tag_t t,bus_size_t size,bus_size_t alignment,bus_size_t boundary,bus_dma_segment_t * segs,int nsegs,int * rsegs,int flags)2179f231495Stakemura _vrdcu_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
2189f231495Stakemura bus_size_t boundary, bus_dma_segment_t *segs,
2199f231495Stakemura int nsegs, int *rsegs, int flags)
2209f231495Stakemura {
2219f231495Stakemura paddr_t high;
2229f231495Stakemura
2239f231495Stakemura DPRINTFN(1, ("_vrdcu_dmamem_alloc\n"));
2249f231495Stakemura
225*9b83c0f5Smatt high = (pmap_limits.avail_end < VRDMAAU_BOUNCE_THRESHOLD ?
226*9b83c0f5Smatt pmap_limits.avail_end : VRDMAAU_BOUNCE_THRESHOLD) - PAGE_SIZE;
2279f231495Stakemura alignment = alignment > VRDMAAU_ALIGNMENT ?
2289f231495Stakemura alignment : VRDMAAU_ALIGNMENT;
2299f231495Stakemura
2309f231495Stakemura return _hpcmips_bd_mem_alloc_range(t, size, alignment, boundary,
2319f231495Stakemura segs, nsegs, rsegs, flags,
232*9b83c0f5Smatt pmap_limits.avail_start, high);
2339f231495Stakemura }
234