xref: /netbsd-src/sys/arch/hpcmips/dev/optpoint.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1 /*	$NetBSD: optpoint.c,v 1.9 2021/08/07 16:18:54 thorpej Exp $ */
2 
3 /*-
4  * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * OptOpint on Telios HC-AJ2
30  */
31 
32 #include <sys/cdefs.h>
33 
34 __KERNEL_RCSID(0, "$NetBSD: optpoint.c,v 1.9 2021/08/07 16:18:54 thorpej Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 #include <machine/bus.h>
40 #include <machine/config_hook.h>
41 #include <dev/hpc/hpciovar.h>
42 #include <dev/wscons/wsconsio.h>
43 #include <dev/wscons/wsmousevar.h>
44 #include <hpcmips/tx/tx39var.h>
45 #include <hpcmips/tx/tx39spivar.h>
46 #include <hpcmips/tx/tx39icureg.h>
47 
48 #undef	OPTPOINTDEBUG
49 
50 #ifdef OPTPOINTDEBUG
51 #define	DPRINTF(arg) printf arg
52 #else
53 #define	DPRINTF(arg)
54 #endif
55 
56 struct optpoint_softc {
57 	device_t sc_dev;
58 	tx_chipset_tag_t sc_tc;
59 	struct tx39spi_softc *sc_spi;
60 	struct hpcio_chip *sc_hc;
61 	device_t sc_wsmousedev;
62 	void *sc_powerhook;	/* power management hook */
63 	char packet[4];
64 	int index;	/* number of bytes received for this packet */
65 	u_int buttons;	/* mouse button status */
66 	int enabled;
67 };
68 
69 static int optpoint_match(device_t, cfdata_t, void *);
70 static void optpoint_attach(device_t, device_t, void *);
71 static int optpoint_intr(void *);
72 static int optpoint_enable(void *);
73 static void optpoint_disable(void *);
74 static int optpoint_ioctl(void *, u_long, void *, int, struct lwp *);
75 static int optpoint_initialize(void *);
76 static void optpoint_send(struct optpoint_softc *, int);
77 static int optpoint_recv(struct optpoint_softc *);
78 static int optpoint_power(void *, int, long, void *);
79 
80 #define LBUTMASK 0x01
81 #define RBUTMASK 0x02
82 
83 #define TX39_INTRSTATUS4_OPTPOINTINT	TX39_INTRSTATUS4_CARDIORDNEGINT
84 #define TX39_IO_MFIO_CARDREG	11
85 #define TX39_IO_MFIO_CARDIOWR	10
86 #define TX39_IO_MFIO_CARDIORD	9
87 #define TELIOS_MFIO_OPTP_T_RDY		TX39_IO_MFIO_CARDREG
88 #define TELIOS_MFIO_OPTP_C_REQ		TX39_IO_MFIO_CARDIOWR
89 #define TELIOS_MFIO_OPTP_S_ENB_N	TX39_IO_MFIO_CARDIORD
90 
91 CFATTACH_DECL_NEW(optpoint, sizeof(struct optpoint_softc),
92     optpoint_match, optpoint_attach, NULL, NULL);
93 
94 const struct wsmouse_accessops optpoint_accessops = {
95 	optpoint_enable,
96 	optpoint_ioctl,
97 	optpoint_disable,
98 };
99 
100 int
optpoint_match(device_t parent,cfdata_t cf,void * aux)101 optpoint_match(device_t parent, cfdata_t cf, void *aux)
102 {
103 	return (ATTACH_NORMAL);
104 }
105 
106 void
optpoint_attach(device_t parent,device_t self,void * aux)107 optpoint_attach(device_t parent, device_t self, void *aux)
108 {
109 	struct txspi_attach_args *ta = aux;
110 	struct optpoint_softc *sc = device_private(self);
111 	struct tx39spi_softc *spi = sc->sc_spi = device_private(parent);
112 	tx_chipset_tag_t tc = sc->sc_tc = ta->sa_tc;
113 	struct wsmousedev_attach_args wsmaa;
114 
115 	sc->sc_dev = self;
116 	sc->sc_hc = tc->tc_iochip[MFIO];
117 	sc->enabled = 0;
118 
119 	/* Specific SPI settings for OptPoint of HC-AJ2 */
120 	tx39spi_delayval(spi, 0);
121 	tx39spi_baudrate(spi, 4);	/* SPICLK Rate = 737.3 kHz */
122 	tx39spi_word(spi, 0);		/* Use 8bits of data */
123 	tx39spi_phapol(spi, 0);
124 	tx39spi_clkpol(spi, 1);
125 	tx39spi_lsb(spi, 0);		/* MSB first */
126 
127 	optpoint_enable(sc);
128 	printf("\n");
129 
130 	wsmaa.accessops = &optpoint_accessops;
131 	wsmaa.accesscookie = sc;
132 	/* attach the wsmouse */
133 	sc->sc_wsmousedev = config_found(self, &wsmaa, wsmousedevprint,
134 	    CFARGS_NONE);
135 
136 	/* Add a hard power hook to power saving */
137 	sc->sc_powerhook = config_hook(CONFIG_HOOK_PMEVENT,
138 				       CONFIG_HOOK_PMEVENT_HARDPOWER,
139 				       CONFIG_HOOK_SHARE,
140 				       optpoint_power, sc);
141 #ifdef DIAGNOSTIC
142 	if (sc->sc_powerhook == 0)
143 		printf("%s: unable to establish hard power hook",
144 		       device_xname(sc->sc_dev));
145 #endif
146 }
147 
148 int
optpoint_intr(void * arg)149 optpoint_intr(void *arg)
150 {
151 	struct optpoint_softc *sc = arg;
152 	tx_chipset_tag_t tc = sc->sc_tc;
153 	char data = optpoint_recv(sc) & 0xff;
154 
155 #ifdef DIAGNOSTIC
156 	if (sc->index >= 3){
157 		printf("%s: Receive buffer overflow\n", device_xname(sc->sc_dev));
158 		sc->index = 0;
159 		memset(sc->packet, 0, 3);
160 	}
161 #endif
162 	if ((sc->index == 1) && (data & 0xcc) != 0x08){
163 		DPRINTF(("%s: Bad second byte (0x%02x)\n",
164 			 device_xname(sc->sc_dev), data));
165 		tx_conf_write(tc, TX39_INTRCLEAR4_REG,
166 				  TX39_INTRSTATUS4_OPTPOINTINT);
167 		return 0;
168 	}
169 
170 	sc->packet[sc->index++] = data;
171 	if (sc->index >= 3){
172 		u_int newbuttons = ((sc->packet[1] & LBUTMASK) ? 0x1 : 0)
173 				 | ((sc->packet[1] & RBUTMASK) ? 0x2 : 0);
174 		int dx = sc->packet[2];
175 		int dy = sc->packet[0];
176 		u_int changed = (sc->buttons ^ newbuttons);
177 
178 		if (dx || dy || changed){
179 			DPRINTF(("%s: buttons=0x%x, dx=%d, dy=%d\n",
180 				 device_xname(sc->sc_dev), newbuttons, dx, dy));
181 			wsmouse_input(sc->sc_wsmousedev,
182 					newbuttons,
183 					dx, dy, 0, 0,
184 					WSMOUSE_INPUT_DELTA);
185 		}
186 		sc->buttons = newbuttons;
187 		sc->index = 0;
188 		memset(sc->packet, 0, 3);
189 	}
190 	tx_conf_write(tc, TX39_INTRCLEAR4_REG, TX39_INTRSTATUS4_OPTPOINTINT);
191 
192 	return 0;
193 }
194 
195 int
optpoint_enable(void * arg)196 optpoint_enable(void *arg)
197 {
198 	struct optpoint_softc *sc = arg;
199 
200 	if (!sc->enabled){
201 		tx_chipset_tag_t tc = sc->sc_tc;
202 		struct hpcio_chip *hc = sc->sc_hc;
203 		int s = spltty();
204 
205 		DPRINTF(("%s: enable\n", device_xname(sc->sc_dev)));
206 
207 		sc->enabled = 1;
208 		sc->index = 0;
209 		sc->buttons = 0;
210 		sc->packet[0] = 0xf5;	/* Disable */
211 		sc->packet[1] = 0xf2;	/* Set Stream Mode */
212 		sc->packet[2] = 0xf8;	/* Stanby */
213 		sc->packet[3] = 0xf4;	/* Enable */
214 
215 		tx39spi_enable(sc->sc_spi, 1);
216 		tx_intr_establish(tc, MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT),
217 				  IST_EDGE, IPL_TTY, optpoint_initialize, sc);
218 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 1);
219 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1);
220 		splx(s);
221 	}
222 
223         return 0;
224 }
225 
226 void
optpoint_disable(void * arg)227 optpoint_disable(void *arg)
228 {
229 	struct optpoint_softc *sc = arg;
230 
231 	if (sc->enabled){
232 		tx_chipset_tag_t tc = sc->sc_tc;
233 		struct hpcio_chip *hc = sc->sc_hc;
234 		int s = spltty();
235 
236 		DPRINTF(("%s: disable\n", device_xname(sc->sc_dev)));
237 
238 		sc->enabled = 0;
239 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 0);
240 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 0);
241 		tx_intr_disestablish(tc,
242 			    (void *)MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT));
243 		tx39spi_enable(sc->sc_spi, 0);
244 		splx(s);
245 	}
246 }
247 
248 int
optpoint_ioctl(void * cookie,u_long cmd,void * data,int flag,struct lwp * l)249 optpoint_ioctl(void *cookie, u_long cmd, void *data, int flag, struct lwp *l)
250 {
251 	switch (cmd) {
252 	case WSMOUSEIO_GTYPE:
253 		*(u_int *)data = WSMOUSE_TYPE_PS2;
254 		break;
255 
256 	default:
257 		return (EPASSTHROUGH);
258 	}
259         return 0;
260 }
261 
262 int
optpoint_initialize(void * arg)263 optpoint_initialize(void *arg)
264 {
265 	struct optpoint_softc *sc = arg;
266 	struct hpcio_chip *hc = sc->sc_hc;
267 	tx_chipset_tag_t tc = sc->sc_tc;
268 
269 	if (sc->index < 4){
270 		optpoint_send(sc, sc->packet[sc->index++]);
271 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 1);
272 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1);
273 	} else {
274 		tx_intr_disestablish(tc,
275 			    (void *)MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT));
276 		sc->index = 0;
277 		memset(sc->packet, 0, 3);
278 		tx_intr_establish(tc,
279 				  MAKEINTR(4, TX39_INTRSTATUS4_OPTPOINTINT),
280 				  IST_EDGE, IPL_TTY, optpoint_intr, sc);
281 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_C_REQ, 0);
282 		(*hc->hc_portwrite)(hc, TELIOS_MFIO_OPTP_T_RDY, 1);
283 	}
284 	tx_conf_write(tc, TX39_INTRCLEAR4_REG, TX39_INTRSTATUS4_OPTPOINTINT);
285 
286 	return 0;
287 }
288 
289 void
optpoint_send(struct optpoint_softc * sc,int data)290 optpoint_send(struct optpoint_softc *sc, int data)
291 {
292 	struct hpcio_chip *hc = sc->sc_hc;
293 
294 	while ((*hc->hc_portread)(hc, TELIOS_MFIO_OPTP_S_ENB_N))
295 		;
296 	tx39spi_put_word(sc->sc_spi, data & 0xff);
297 }
298 
299 int
optpoint_recv(struct optpoint_softc * sc)300 optpoint_recv(struct optpoint_softc *sc)
301 {
302 	struct hpcio_chip *hc = sc->sc_hc;
303 
304 	optpoint_send(sc, 0x00);
305 	while ((*hc->hc_portread)(hc, TELIOS_MFIO_OPTP_S_ENB_N))
306 		;
307 	return tx39spi_get_word(sc->sc_spi) & 0xff;
308 }
309 
310 int
optpoint_power(void * arg,int type,long id,void * msg)311 optpoint_power(void *arg, int type, long id, void *msg)
312 {
313 	struct optpoint_softc *sc = arg;
314 	int why = (int)msg;
315 
316 	switch (why) {
317 	case PWR_RESUME:
318 		/* power on */
319 		optpoint_enable(sc);
320 		break;
321 	case PWR_SUSPEND:
322 		/* FALLTHROUGH */
323 	case PWR_STANDBY:
324 		/* power off */
325 		optpoint_disable(sc);
326 		break;
327 	}
328 
329 	return 0;
330 }
331