1 /* $NetBSD: nbpiic.c,v 1.6 2022/06/18 22:11:00 andvar Exp $ */
2 /*
3 * Copyright (c) 2011 KIYOHARA Takashi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: nbpiic.c,v 1.6 2022/06/18 22:11:00 andvar Exp $");
29
30 #include <sys/param.h>
31 #include <sys/device.h>
32 #include <sys/mutex.h>
33
34 #include <machine/platid.h>
35 #include <machine/platid_mask.h>
36
37 #include <arm/xscale/pxa2x0var.h>
38 #include <arm/xscale/pxa2x0_i2c.h>
39
40 #include <hpcarm/dev/nbppconvar.h>
41
42 #include <dev/i2c/i2cvar.h>
43
44 #include "nbppcon.h"
45
46 #define NBPIIC_SLAVE_ADDR 0x70
47
48 struct nbpiic_softc {
49 struct pxa2x0_i2c_softc sc_pxa_i2c;
50
51 struct i2c_controller sc_i2c;
52 kmutex_t sc_lock;
53
54 device_t sc_pcon;
55 char sc_buf[16];
56 int sc_idx;
57 };
58
59
60 static int pxaiic_match(device_t, cfdata_t, void *);
61 static void pxaiic_attach(device_t, device_t, void *);
62
63 static int nbpiic_intr(void *);
64 int nbpiic_poll(void *, int, char *);
65
66 /* functions for i2c_controller */
67 static int nbpiic_exec(void *cookie, i2c_op_t, i2c_addr_t, const void *, size_t,
68 void *, size_t, int);
69
70 CFATTACH_DECL_NEW(pxaiic, sizeof(struct nbpiic_softc),
71 pxaiic_match, pxaiic_attach, NULL, NULL);
72
73
74 /* ARGSUSED */
75 static int
pxaiic_match(device_t parent,cfdata_t match,void * aux)76 pxaiic_match(device_t parent, cfdata_t match, void *aux)
77 {
78 struct pxaip_attach_args *pxa = aux;
79
80 if (strcmp(pxa->pxa_name, match->cf_name) != 0 ||
81 !platid_match(&platid, &platid_mask_MACH_PSIONTEKLOGIX_NETBOOK_PRO))
82 return 0;
83
84 pxa->pxa_size = PXA2X0_I2C_SIZE;
85 return 1;
86 }
87
88 /* ARGSUSED */
89 static void
pxaiic_attach(device_t parent,device_t self,void * aux)90 pxaiic_attach(device_t parent, device_t self, void *aux)
91 {
92 struct nbpiic_softc *sc = device_private(self);
93 struct pxaip_attach_args *pxa = aux;
94 struct i2cbus_attach_args iba;
95 void *ih;
96
97 aprint_normal("\n");
98 aprint_naive("\n");
99
100 sc->sc_pxa_i2c.sc_dev = self;
101 sc->sc_pxa_i2c.sc_iot = pxa->pxa_iot;
102 sc->sc_pxa_i2c.sc_addr = pxa->pxa_addr;
103 sc->sc_pxa_i2c.sc_size = pxa->pxa_size;
104 sc->sc_pxa_i2c.sc_isar = NBPIIC_SLAVE_ADDR;
105 sc->sc_pxa_i2c.sc_stat = PI2C_STAT_INIT;
106 if (pxa2x0_i2c_attach_sub(&sc->sc_pxa_i2c)) {
107 aprint_error_dev(self, "unable to attach PXA I2C\n");
108 return;
109 }
110
111 /*
112 * Initialize mutex with IPL_HIGH. Keyboard was connected to us.
113 * This is orthogonal to the lock held at the i2c layer; this
114 * is just to interlock us with the keyboard interrupt.
115 */
116 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
117
118 ih = pxa2x0_intr_establish(pxa->pxa_intr, IPL_HIGH, nbpiic_intr, sc);
119 if (ih == NULL) {
120 aprint_error_dev(self, "intr_establish failed\n");
121 return;
122 }
123
124 /* Initialize i2c_controller */
125 iic_tag_init(&sc->sc_i2c);
126 sc->sc_i2c.ic_cookie = sc;
127 sc->sc_i2c.ic_exec = nbpiic_exec;
128
129 memset(&iba, 0, sizeof(iba));
130 iba.iba_tag = &sc->sc_i2c;
131 pxa2x0_i2c_open(&sc->sc_pxa_i2c);
132 config_found(self, &iba, iicbus_print, CFARGS_NONE);
133
134 sc->sc_pcon = device_find_by_xname("nbppcon0");
135
136 /* Don't close I2C-bus. We are slave device. */
137 }
138
139 static int
nbpiic_intr(void * arg)140 nbpiic_intr(void *arg)
141 {
142 struct nbpiic_softc *sc = arg;
143 struct pxa2x0_i2c_softc *pi2c = &sc->sc_pxa_i2c;
144 int handled, len;
145
146 handled = pxa2x0_i2c_intr_sub(pi2c, &len, &sc->sc_buf[sc->sc_idx]);
147 if (len != 0)
148 sc->sc_idx += len;
149 if (pi2c->sc_stat == PI2C_STAT_STOP) {
150 #if NNBPPCON > 0
151 nbppcon_intr(sc->sc_pcon, sc->sc_idx, sc->sc_buf);
152 #endif
153 sc->sc_idx = 0;
154 pi2c->sc_stat = PI2C_STAT_INIT;
155 }
156
157 return handled;
158 }
159
160 int
nbpiic_poll(void * cookie,int buflen,char * buf)161 nbpiic_poll(void *cookie, int buflen, char *buf)
162 {
163 struct nbpiic_softc *sc = cookie;
164 int rv;
165
166 if (sc->sc_idx > 0) {
167 if (buflen < sc->sc_idx) {
168 (void) pxa2x0_i2c_poll(&sc->sc_pxa_i2c,
169 sizeof(sc->sc_buf) - sc->sc_idx, buf + sc->sc_idx,
170 I2C_F_READ);
171 sc->sc_idx = 0;
172 } else
173 memcpy(buf, sc->sc_buf, sc->sc_idx);
174 }
175 rv = pxa2x0_i2c_poll(&sc->sc_pxa_i2c,
176 buflen - sc->sc_idx, buf + sc->sc_idx, I2C_F_READ);
177 sc->sc_idx = 0;
178
179 return rv;
180 }
181
182 static int
nbpiic_exec(void * cookie,i2c_op_t op,i2c_addr_t addr,const void * vcmd,size_t cmdlen,void * vbuf,size_t buflen,int flags)183 nbpiic_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
184 size_t cmdlen, void *vbuf, size_t buflen, int flags)
185 {
186 struct nbpiic_softc *sc = cookie;
187 int rv = -1;
188 const u_char cmd = *(const u_char *)vcmd;
189
190 mutex_enter(&sc->sc_lock);
191
192 if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1))
193 rv = pxa2x0_i2c_read(&sc->sc_pxa_i2c, addr, (u_char *)vbuf);
194
195 if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
196 rv = pxa2x0_i2c_write(&sc->sc_pxa_i2c, addr, cmd);
197 if (rv == 0)
198 rv = pxa2x0_i2c_read(&sc->sc_pxa_i2c,
199 addr, (u_char *)vbuf);
200 }
201
202 if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
203 printf("%s: read cmdlen=1, buflen=2: Ooops, maybe error...\n", __func__);
204 rv = pxa2x0_i2c_write(&sc->sc_pxa_i2c, addr, cmd);
205 if (rv == 0)
206 rv = pxa2x0_i2c_read(&sc->sc_pxa_i2c,
207 addr, &((u_char *)vbuf)[0]);
208 if (rv == 0)
209 rv = pxa2x0_i2c_read(&sc->sc_pxa_i2c,
210 addr, &((u_char *)vbuf)[1]);
211 }
212
213 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
214 rv = pxa2x0_i2c_write(&sc->sc_pxa_i2c, addr, *(u_char *)vbuf);
215
216 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1)) {
217 u_short v = (cmd << 8) | ((u_char *)vbuf)[0];
218
219 rv = pxa2x0_i2c_write_2(&sc->sc_pxa_i2c, addr, v);
220 }
221
222 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2)) {
223 printf("%s: write cmdlen=1, buflen=2: Ooops, maybe error...\n", __func__);
224 rv = pxa2x0_i2c_write(&sc->sc_pxa_i2c, addr, cmd);
225 if (rv == 0) {
226 u_short v =
227 (((u_char *)vbuf)[0] << 8) | ((u_char *)vbuf)[1];
228
229 rv = pxa2x0_i2c_write_2(&sc->sc_pxa_i2c, addr, v);
230 }
231 }
232
233 /* Handle quick_read/quick_write ops - XXX Untested XXX */
234 if ((cmdlen == 0) && (buflen == 0))
235 rv = pxa2x0_i2c_quick(&sc->sc_pxa_i2c, addr,
236 I2C_OP_READ_P(op) ? 1 : 0);
237
238 mutex_exit(&sc->sc_lock);
239
240 return rv;
241 }
242