1 /* $NetBSD: ipaq_atmelgpio.c,v 1.19 2023/12/20 14:50:02 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA (ichiro@ichiro.org).
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30 /*
31 * iPAQ uses Atmel microcontroller to service a few of peripheral devices.
32 * This controller connect to UART1 of SA11x0.
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.19 2023/12/20 14:50:02 thorpej Exp $");
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/types.h>
41 #include <sys/conf.h>
42 #include <sys/file.h>
43 #include <sys/device.h>
44 #include <sys/kernel.h>
45 #include <sys/kthread.h>
46 #include <sys/bus.h>
47
48 #include <hpcarm/dev/ipaq_saipvar.h>
49 #include <hpcarm/dev/ipaq_gpioreg.h>
50 #include <hpcarm/dev/ipaq_atmel.h>
51 #include <hpcarm/dev/ipaq_atmelvar.h>
52
53 #include <arm/sa11x0/sa11x0_gpioreg.h>
54 #include <arm/sa11x0/sa11x0_comreg.h>
55 #include <arm/sa11x0/sa11x0_reg.h>
56
57 #ifdef ATMEL_DEBUG
58 #define DPRINTF(x) aprint_normal x
59 #else
60 #define DPRINTF(x)
61 #endif
62
63 static int atmelgpio_match(device_t, cfdata_t, void *);
64 static void atmelgpio_attach(device_t, device_t, void *);
65 static int atmelgpio_print(void *, const char *);
66 static int atmelgpio_search(device_t, cfdata_t, const int *, void *);
67 static void atmelgpio_init(struct atmelgpio_softc *);
68
69 static void rxtx_data(struct atmelgpio_softc *, int, int,
70 uint8_t *, struct atmel_rx *);
71
72 CFATTACH_DECL_NEW(atmelgpio, sizeof(struct atmelgpio_softc),
73 atmelgpio_match, atmelgpio_attach, NULL, NULL);
74
75 static int
atmelgpio_match(device_t parent,cfdata_t cf,void * aux)76 atmelgpio_match(device_t parent, cfdata_t cf, void *aux)
77 {
78 return (1);
79 }
80
81 static void
atmelgpio_attach(device_t parent,device_t self,void * aux)82 atmelgpio_attach(device_t parent, device_t self, void *aux)
83 {
84 struct atmelgpio_softc *sc = device_private(self);
85 struct ipaq_softc *psc = device_private(parent);
86
87 struct atmel_rx rxbuf;
88
89 aprint_normal("\n");
90 aprint_normal_dev(self, "Atmel microcontroller GPIO\n");
91
92 sc->sc_iot = psc->sc_iot;
93 sc->sc_ioh = psc->sc_ioh;
94 sc->sc_parent = psc;
95
96 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0,
97 &sc->sc_ioh)) {
98 aprint_normal_dev(self, "unable to map of UART1 registers\n");
99 return;
100 }
101
102 atmelgpio_init(sc);
103
104 rxbuf.idx = 0;
105 rxbuf.len = 0;
106
107 #if 1 /* this is sample */
108 rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf);
109
110 aprint_normal("ac_status = %x\n", rxbuf.data[0]);
111 aprint_normal("Battery kind = %x\n", rxbuf.data[1]);
112 aprint_normal("Voltage = %d mV\n",
113 1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228);
114 aprint_normal("Battery Status = %x\n", rxbuf.data[4]);
115 aprint_normal("Battery percentage = %d\n",
116 425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298);
117 #endif
118
119 rxtx_data(sc, READ_IIC, 0, NULL, &rxbuf);
120
121 /*
122 * Attach each devices
123 */
124
125 config_search(self, NULL,
126 CFARGS(.search = atmelgpio_search));
127 }
128
129 static int
atmelgpio_search(device_t parent,cfdata_t cf,const int * ldesc,void * aux)130 atmelgpio_search(device_t parent, cfdata_t cf, const int *ldesc,
131 void *aux)
132 {
133 if (config_probe(parent, cf, NULL))
134 config_attach(parent, cf, NULL, atmelgpio_print, CFARGS_NONE);
135 return 0;
136 }
137
138
139 static int
atmelgpio_print(void * aux,const char * name)140 atmelgpio_print(void *aux, const char *name)
141 {
142 return (UNCONF);
143 }
144
145 static void
atmelgpio_init(struct atmelgpio_softc * sc)146 atmelgpio_init(struct atmelgpio_softc *sc)
147 {
148 /* 8 bits no parity 1 stop bit */
149 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS);
150
151 /* Set baud rate 115k */
152 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0);
153 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200));
154
155 /* RX/TX enable, RX/TX FIFO interrupt enable */
156 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3,
157 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE));
158 }
159
160 static void
rxtx_data(struct atmelgpio_softc * sc,int id,int size,uint8_t * buf,struct atmel_rx * rxbuf)161 rxtx_data(struct atmelgpio_softc *sc, int id, int size, uint8_t *buf,
162 struct atmel_rx *rxbuf)
163 {
164 int i, checksum, length, rx_data;
165 uint8_t data[MAX_SENDSIZE];
166
167 length = size + FRAME_OVERHEAD_SIZE;
168
169 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS))
170 ;
171
172 data[0] = (uint8_t)FRAME_SOF;
173 data[1] = (uint8_t)((id << 4) | size);
174 checksum = data[1];
175 i = 2;
176 while (size--) {
177 data[i++] = *buf;
178 checksum += (uint8_t)(*buf++);
179 }
180 data[length-1] = checksum;
181
182 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF))
183 ;
184 i = 0;
185 while (i < length)
186 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]);
187
188 delay(10000);
189 #if 0
190 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) &
191 (SR0_RID | SR0_RFS)))
192 #endif
193 rxbuf->state = STATE_SOF;
194 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) {
195
196 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR);
197 DPRINTF(("DATA = %x\n", rx_data));
198
199 switch (rxbuf->state) {
200 case STATE_SOF:
201 if (rx_data == FRAME_SOF)
202 rxbuf->state = STATE_ID;
203 break;
204 case STATE_ID:
205 rxbuf->id = (rx_data & 0xf0) >> 4;
206 rxbuf->len = rx_data & 0x0f;
207 rxbuf->idx = 0;
208 rxbuf->checksum = rx_data;
209 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF;
210 break;
211 case STATE_DATA:
212 rxbuf->checksum += rx_data;
213 rxbuf->data[rxbuf->idx] = rx_data;
214 if (++rxbuf->idx == rxbuf->len)
215 rxbuf->state = STATE_EOF;
216 break;
217 case STATE_EOF:
218 rxbuf->state = STATE_SOF;
219 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum)
220 DPRINTF(("frame EOF\n"));
221 else
222 DPRINTF(("BadFrame\n"));
223 break;
224 default:
225 break;
226 }
227 }
228 }
229