1/* $NetBSD: wii_mmuinit.S,v 1.2 2024/10/13 16:21:37 jmcneill Exp $ */ 2 3/*- 4 * Copyright (C) 2012 Margarida Gouveia 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30#include <powerpc/oea/bat.h> 31 32/* 33 * When we are invoked from Wii loaders, the state of the MMU and the BAT 34 * mappings can vary. In this file we try to reset the MMU to a state 35 * that lets us boot NetBSD. 36 * 37 * This file is being included from wii_locore.S. 38 */ 39 40#define MMU_REALMODE() \ 41 mfmsr %r12; \ 42 rlwinm %r12, %r12, 0, ~(PSL_DR|PSL_IR);\ 43 sync; \ 44 bl 1f; \ 451: \ 46 mflr %r11; \ 47 clrlwi %r11, %r11, 3; /* XXX why? */ \ 48 addi %r11, %r11, 2f - 1b; \ 49 mtsrr0 %r11; \ 50 mtsrr1 %r12; /* Disables the MMU */ \ 51 isync; \ 52 rfi; \ 532: 54 55#define MMU_VIRTUALMODE() \ 56 bl 3f; \ 573: \ 58 mflr %r11; \ 59 addi %r11, %r11, 4f - 3b; \ 60 mfmsr %r12; \ 61 ori %r12, %r12, PSL_DR|PSL_IR; \ 62 mtsrr0 %r11; \ 63 mtsrr1 %r12; /* Enables the MMU */ \ 64 isync; \ 65 rfi; \ 664: 67 68 MMU_REALMODE() 69 70 /* Initialize HID0 and HID4 */ 71 lis %r11, 0x0011 72 ori %r11, %r11, 0x0c64 73 mtspr SPR_HID0, %r11 74 isync 75 76 lis %r11, 0x8200 77 mtspr 1011, %r11 /* 1011 = SPR_HID4 */ 78 isync 79 80 mfspr %r11, 920 81 oris %r11, %r11, 0xa000 82 mtspr 920, %r11 83 84 mfspr %r11, SPR_HID0 85 ori %r11, %r11, 0xc000 86 ori %r11, %r11, 0x0800 87 ori %r11, %r11, 0x0200 88 mtspr SPR_HID0, %r11 89 isync 90 91 /* Reset standard BATs */ 92 li %r11, 0 93 mtibatu 0, %r11 94 mtibatl 0, %r11 95 mtdbatu 0, %r11 96 mtdbatl 0, %r11 97 mtibatu 1, %r11 98 mtibatl 1, %r11 99 mtdbatu 1, %r11 100 mtdbatl 1, %r11 101 mtibatu 2, %r11 102 mtibatl 2, %r11 103 mtdbatu 2, %r11 104 mtdbatl 2, %r11 105 mtibatu 3, %r11 106 mtibatl 3, %r11 107 mtdbatu 3, %r11 108 mtdbatl 3, %r11 109 110 /* Reset high BATs. IBAT[4-7][UL] + DBAT[4-7][UL] */ 111 mtspr 560, %r11 112 mtspr 561, %r11 113 mtspr 562, %r11 114 mtspr 563, %r11 115 mtspr 564, %r11 116 mtspr 565, %r11 117 mtspr 566, %r11 118 mtspr 567, %r11 119 mtspr 568, %r11 120 mtspr 569, %r11 121 mtspr 570, %r11 122 mtspr 571, %r11 123 mtspr 572, %r11 124 mtspr 573, %r11 125 mtspr 574, %r11 126 mtspr 575, %r11 127 128 /* 129 * We need to setup BAT0 as in mmu_oea.c. 130 */ 131 li %r11, BATU(0x00000000, BAT_BL_256M, BAT_Vs) 132 li %r12, BATL(0x00000000, BAT_M, BAT_PP_RW) 133 mtdbatu 0, %r11 134 mtdbatl 0, %r12 135 mtibatu 0, %r11 136 mtibatl 0, %r12 137 isync 138 139 /* 140 * We use BAT1 to be able to write I/O memory, including the 141 * framebuffer registers. 142 */ 143 /* BATU(0x0c000000, BAT_BL_32M, BAT_Vs) */ 144 lis %r11, 0x0c00 145 ori %r11, %r11, BAT_BL_32M|BAT_Vs 146 /* BATL(0x0c000000, BAT_I|BAT_G, BAT_PP_RW) */ 147 lis %r12, 0x0c00 148 ori %r12, %r12, BAT_I|BAT_G|BAT_PP_RW 149 mtdbatu 1, %r11 150 mtdbatl 1, %r12 151 isync 152 153 MMU_VIRTUALMODE() 154