1 /* $NetBSD: hwgpio.c,v 1.1 2024/01/23 21:48:12 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2024 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: hwgpio.c,v 1.1 2024/01/23 21:48:12 jmcneill Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/device.h>
36 #include <sys/kmem.h>
37 #include <sys/bitops.h>
38 #include <sys/gpio.h>
39
40 #include <dev/gpio/gpiovar.h>
41
42 #include <machine/wii.h>
43
44 #include "hollywood.h"
45
46 #define PIN(_num, _name, _caps) \
47 { .pin_num = (_num), \
48 .pin_caps = (_caps), \
49 .pin_defname = (_name), \
50 }
51 static gpio_pin_t hwgpio_pins[] = {
52 PIN( 0, "POWER", GPIO_PIN_INPUT),
53 PIN( 1, "SHUTDOWN", GPIO_PIN_OUTPUT),
54 PIN( 2, "FAN", GPIO_PIN_OUTPUT),
55 PIN( 3, "DC_DC", GPIO_PIN_OUTPUT),
56 PIN( 4, "DI_SPIN", GPIO_PIN_OUTPUT),
57 PIN( 5, "SLOT_LED", GPIO_PIN_OUTPUT),
58 PIN( 6, "EJECT_BTN", GPIO_PIN_INPUT),
59 PIN( 7, "SLOT_IN", GPIO_PIN_INPUT),
60 PIN( 8, "SENSOR_BAR", GPIO_PIN_OUTPUT),
61 PIN( 9, "DO_EJECT", GPIO_PIN_OUTPUT),
62 PIN(10, "EEP_CS", GPIO_PIN_OUTPUT),
63 PIN(11, "EEP_CLK", GPIO_PIN_OUTPUT),
64 PIN(12, "EEP_MOSI", GPIO_PIN_OUTPUT),
65 PIN(13, "EEP_MISO", GPIO_PIN_INPUT),
66 PIN(14, "AVE_SCL", GPIO_PIN_OUTPUT),
67 PIN(15, "AVE_SDA", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
68 PIN(16, "DEBUG0", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
69 PIN(17, "DEBUG1", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
70 PIN(18, "DEBUG2", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
71 PIN(19, "DEBUG3", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
72 PIN(20, "DEBUG4", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
73 PIN(21, "DEBUG5", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
74 PIN(22, "DEBUG6", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
75 PIN(23, "DEBUG7", GPIO_PIN_INPUT | GPIO_PIN_OUTPUT),
76 };
77 #undef PIN
78
79 struct hwgpio_softc {
80 struct gpio_chipset_tag sc_gp;
81 };
82
83 #define RD4(reg) in32(reg)
84 #define WR4(reg, val) out32((reg), (val))
85
86 static int
hwgpio_pin_read(void * priv,int pin)87 hwgpio_pin_read(void *priv, int pin)
88 {
89 return (RD4(HW_GPIOB_IN) & __BIT(pin)) != 0;
90 }
91
92 static void
hwgpio_pin_write(void * priv,int pin,int value)93 hwgpio_pin_write(void *priv, int pin, int value)
94 {
95 uint32_t out;
96 int s;
97
98 s = splhigh();
99 out = RD4(HW_GPIOB_OUT);
100 if (value) {
101 out |= __BIT(pin);
102 } else {
103 out &= ~__BIT(pin);
104 }
105 WR4(HW_GPIOB_OUT, out);
106 splx(s);
107 }
108
109 static void
hwgpio_pin_ctl(void * priv,int pin,int flags)110 hwgpio_pin_ctl(void *priv, int pin, int flags)
111 {
112 uint32_t dir;
113 int s;
114
115 s = splhigh();
116 dir = RD4(HW_GPIOB_DIR);
117 if (flags & GPIO_PIN_OUTPUT) {
118 dir |= __BIT(pin);
119 } else {
120 dir &= ~__BIT(pin);
121 }
122 WR4(HW_GPIOB_DIR, dir);
123 splx(s);
124 }
125
126 static int
hwgpio_match(device_t parent,cfdata_t cf,void * aux)127 hwgpio_match(device_t parent, cfdata_t cf, void *aux)
128 {
129 return 1;
130 }
131
132 static void
hwgpio_attach(device_t parent,device_t self,void * aux)133 hwgpio_attach(device_t parent, device_t self, void *aux)
134 {
135 struct hwgpio_softc * const sc = device_private(self);
136 struct gpio_chipset_tag *gp = &sc->sc_gp;
137 struct gpiobus_attach_args gba = {};
138 uint32_t in, out, dir;
139 u_int n;
140
141 gp->gp_cookie = sc;
142 gp->gp_pin_read = hwgpio_pin_read;
143 gp->gp_pin_write = hwgpio_pin_write;
144 gp->gp_pin_ctl = hwgpio_pin_ctl;
145
146 aprint_naive("\n");
147 aprint_normal(": GPIO\n");
148
149 in = RD4(HW_GPIOB_IN);
150 out = RD4(HW_GPIOB_OUT);
151 dir = RD4(HW_GPIOB_DIR);
152 for (n = 0; n < __arraycount(hwgpio_pins); n++) {
153 const uint32_t mask = __BIT(hwgpio_pins[n].pin_num);
154 if (dir & mask) {
155 hwgpio_pins[n].pin_state = (out & mask) != 0;
156 } else {
157 hwgpio_pins[n].pin_state = (in & mask) != 0;
158 }
159 }
160
161 gba.gba_gc = &sc->sc_gp;
162 gba.gba_pins = hwgpio_pins;
163 gba.gba_npins = __arraycount(hwgpio_pins);
164 config_found(self, &gba, NULL, CFARGS_NONE);
165 }
166
167 CFATTACH_DECL_NEW(hwgpio, sizeof(struct hwgpio_softc),
168 hwgpio_match, hwgpio_attach, NULL, NULL);
169