xref: /netbsd-src/sys/arch/cobalt/stand/boot/pci.c (revision b87210fa510e6eecfd48e218f3aefcb05cbe4636)
1 /*	$NetBSD: pci.c,v 1.2 2008/05/14 13:29:28 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 2008 Izumi Tsutsui.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/param.h>
28 
29 #include <lib/libsa/stand.h>
30 #include <lib/libkern/libkern.h>
31 
32 #include <mips/cpuregs.h>
33 #include <cobalt/dev/gtreg.h>
34 
35 #include "boot.h"
36 
37 #define GT_BASE		0x14000000
38 
39 uint32_t
pcicfgread(uint32_t tag,uint32_t off)40 pcicfgread(uint32_t tag, uint32_t off)
41 {
42 	uint32_t reg;
43 	volatile uint32_t *pcicfg_addr, *pcicfg_data;
44 
45 	pcicfg_addr = (uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_PCICFG_ADDR);
46 	pcicfg_data = (uint32_t *)MIPS_PHYS_TO_KSEG1(GT_BASE + GT_PCICFG_DATA);
47 
48 	*pcicfg_addr = PCICFG_ENABLE | tag | (off & ~3U);
49 	reg = *pcicfg_data;
50 	*pcicfg_addr = 0;
51 
52 	return reg;
53 }
54