xref: /netbsd-src/sys/arch/cobalt/dev/gt_io_space.c (revision be86510ba0bf93ac930cd4c2b6134c2b4d4064a5)
1 /*	$NetBSD: gt_io_space.c,v 1.1 2018/01/20 13:56:09 skrll Exp $	*/
2 
3 /*
4  * Copyright (c) 2016 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Nick Hudson.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Little Endian bus_space(9) support for PCI IO access
34  * on cobalt machines
35  */
36 
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: gt_io_space.c,v 1.1 2018/01/20 13:56:09 skrll Exp $");
39 
40 #include <sys/types.h>
41 #include <sys/param.h>
42 #include <sys/bus.h>
43 
44 #include <cobalt/dev/gtvar.h>
45 
46 #define	CHIP			gt
47 #define	CHIP_IO			/* defined */
48 
49 /* IO region 1 */
50 #define	CHIP_W1_BUS_START(v)	0x00000000UL
51 #define	CHIP_W1_BUS_END(v)	0x02000000UL
52 #define	CHIP_W1_SYS_START(v)	0x10000000UL
53 #define	CHIP_W1_SYS_END(v)	0x12000000UL
54 
55 void mainbus_bus_mem_init(bus_space_tag_t, void *);
56 
57 #include <mips/mips/bus_space_alignstride_chipdep.c>
58